- Fixed access to symbols with offset.
- Always use register R9 for GOT pointer to prevent bugs when free register limit is reached in a function.
- GOT is not needed for function calls by name.
git-svn-id: trunk@31681 -
that we can use assembler writers with different conventions from the
currently set target_asm (e.g. an x86 assembler writer for inline assembly
in LLVM IR)
git-svn-id: trunk@31628 -
* generate code to load the TOC register if it's required, and
emit the the ".localentry" directive to indicate to the linker
where the actual function body starts
* support the ".localentry" directive in the ppc64 assembler reader
o disable the fpc_qword_to_double() assembler implementation for
ELFv2, because we can't manually insert the .localentry directive
before the stack allocation code
* perform indirect calls on ppc64 via R12 in ncgcal, as R12 needs to
contain the function address on entry on ppc64/ELFv2 (and it's
a volatile register, so there's no problem with always using
it)
git-svn-id: trunk@30198 -
names, and disabled them for ppc64 ELFv2
* disabling those also disables the function descriptors, so use the
_CALL_ELF compiler variable to check whether there is in fact a
function descriptor
git-svn-id: trunk@30196 -
to free up space for more ait_* types in taitype (can't have
more than 32 because they have to fit in a small set)
o factored out writing of floating point numbers as an array of
byte in the external assemblers
git-svn-id: branches/hlcgllvm@28105 -
the value set by -Ch or the second parameter to the $M directive). This is
equivalent to the heapmin value in Turbo Pascal 7 and ensures that the program
has at least this amount of heap space available (otherwise DOS will show a
'not enough memory' error and will refuse to load the program).
git-svn-id: trunk@28002 -
itself (instead of having a fixed 16k stack in the startup code). This allows
setting the stack size in these models with the -Cs option.
git-svn-id: trunk@27820 -
otherwise data in initialised packed records gets aligned wrongly. This
should probably also be done for other targets that automatically
align .short/.long/...
git-svn-id: trunk@27600 -
Add support for .set and .weak on AVR.
Fix 64 bit negation on AVR.
Add cpu_capabilities to cpuinfo.pas and fixed some peephole optimizations.
Pass >4 byte parameters by reference.
git-svn-id: trunk@26943 -
* Change MIPS jump tables in PIC mode to use gp-relative constants, making them ABI-compliant and not requiring dynamic relocations.
git-svn-id: trunk@26886 -
* aggas.pas, TGNUAssembler.WriteTree.doalign:
instead of strangely checking for the previous instruction always use .balignw if the previous code was code and we should not use a specific instruction
git-svn-id: trunk@26839 -
Therefor the cpu type (-Cp...) "coldfire" was split up into "isaa", "isaa+", "isab" and "isac". The Linux RTL can currently compiled for "68020", "isab" and "isac". For the other three Bcc.L must be handled differently (only Bcc.B/W supported) and for "68000" also EXT.L needs to be handled differently.
fpcdefs.inc:
+ define CPUCAPABILITIES if capabilities can be set for a certain CPU type (currently ARM, AVR and M68k)
options.pas:
* check for CPUCAPABILITIES instead of specific CPUs
assemble.pas:
- the handling of the CPU type is already done in m68k/ag68kgas.pas, Tm68kGNUAssembler.MakeCmdLine (and thereby already using the gascputypestr array!)
m68k/cpuinfo.pas:
- tcputype: remove "cpu_coldfire"
+ tcputype: add "cpu_isa_a", "cpu_isa_a_p", "cpu_isa_b" and "cpu_isa_c"
+ add "cpu_coldfire" constant which contains all Coldfire specific cpu types
* adjust "cputypestr" and "gascputypestr"
+ add tcpuflags and cpu_capabilities (DBRA restriction was checked with CPUCOLDFIRE, CAS/TAS will be needed for atomic operations and BRAL restriction was discovered during testing of new cpu types)
m68k/cgcpu.pas:
* adjust checks for "cpu_coldfire"
m68k/n68kadd.pas:
* don't use a BRA.L if it is not supported, but (at least for now) a BRA.W
aggas.pas:
* adjusted check for Coldfire
git-svn-id: trunk@25457 -
