U rtl/inc/objc.pp
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U compiler/arm/cgcpu.pas
U compiler/cgobj.pas
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U compiler/scanner.pas
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U compiler/pexpr.pas
A tests/webtbf/tw35149a.pp
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U compiler/aarch64/racpugas.pas
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git-svn-id: branches/fixes_3_2@41943 -
so that they can still be freed after the reference has been changed
(e.g. in case of array indexing or record field accesses) (mantis #33628)
git-svn-id: trunk@38814 -
tcpuparamanager, very similar to the existing get_volatile_registers_XXX. The
new methods are called get_saved_registers_XXX, where XXX is the register
type ("int", "address", "fpu" or "mm")
git-svn-id: trunk@38794 -
from cpubase unit to a method in the tcg class. The reason for doing that is
that this is now a standard part of the 16-bit and 8-bit code generators and
moving to the tcg class allows doing extra checks (not done yet, but for
example, in the future, we can keep track of whether there was an extra
register allocated with getintregister and halt with an internalerror in case
GetNextReg() is called for registers, which weren't allocated as a part of a
sequence, therefore catching a certain class of 8-bit and 16-bit code
generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
anything. It might be added to the tcg class, in case it's ever needed, but
for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.
git-svn-id: trunk@37180 -
o separate information for reading and writing, because e.g. in a
try-block, only the writes to local variables and parameters are
volatile (they have to be committed immediately in case the next
instruction causes an exception)
o for now, only references to absolute memory addresses are marked
as volatile
o the volatily information is (should be) properly maintained throughout
all code generators for all archictures with this patch
o no optimizers or other compiler infrastructure uses the volatility
information yet
o this functionality is not (yet) exposed at the language level, it
is only for internal code generator use right now
git-svn-id: trunk@34996 -
it was AT_NONE, which is invalid and should never be used
* explicitly pass the correct value for all calls to those methods elsewhere
in the compiler
git-svn-id: trunk@34250 -
tasmdata.DefineAsmSymbol() and all routines that call it
o will be used to automatically generate AB_INDIRECT sybols when
necessary
git-svn-id: trunk@34164 -
paralocs (e.g. a 3 byte record) in case the data's size has been
rounded up to the next power of two as far as the paraloc is concerned
(because those 3 bytes had to be shifted to be located in the upper 3
bytes of a 4 byte location)
git-svn-id: trunk@32633 -
type-safe way (for LLVM, and also internal consistency checking between
the VMT as generated in nobj.pas and ncgvmt.pas)
o also converted the VMT validity checking to the node level
git-svn-id: trunk@30950 -
* tcg.a_reg_dealloc: ignore NR_NO, prevents creating useless deallocations of NR_DEFAULTFLAGS on MIPS targets which have NR_DEFAULTFLAGS=NR_NO.
git-svn-id: trunk@29242 -
hardcoded registers for the most part)
+ added extra g_exception_discard_reason() that can be called when we only
want to get rid of the currently pushed exception reason, and don't have
to load it (so it can do nothing on platforms that don't use push/pop)
git-svn-id: branches/hlcgllvm@28481 -
The code generator gets two new methods, a_mul_reg_reg_pair and g_div_const_reg_reg. The first one is basically 32x32 to 64 bits multiplication (or any other size, with result having twice the size of arguments), which must be implemented for every target. The second one actually does the job, its default implementation taken from powerpc64 and is sufficiently good for all three-address targets.
+ Enabled optimized division for MIPS target, target-specific changes are under 30 lines.
git-svn-id: trunk@27904 -
