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56b79257a1
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Author SHA1 Message Date
nickysn
56b79257a1 * fixed fpmake invokation when building an i386-linux snapshot on a x86_64-linux host 
git-svn-id: trunk@45298 -
 2020-05-06 20:41:01 +00:00
Mattias Gaertner
14ccc191eb pas2js: arraySetLength: faster resize 
git-svn-id: trunk@45297 -
 2020-05-06 20:09:35 +00:00
Mattias Gaertner
728a60c155 pas2js: fixed compile under nodejs 
git-svn-id: trunk@45296 -
 2020-05-06 19:48:13 +00:00
Mattias Gaertner
da799883dd pas2js: type helper for wordbool 
git-svn-id: trunk@45295 -
 2020-05-06 19:31:43 +00:00
Mattias Gaertner
86cfd866f4 pas2js: started array SetLength using resize and hidden boolean to mark referenced arrays 
git-svn-id: trunk@45294 -
 2020-05-06 19:13:33 +00:00
Mattias Gaertner
c66ac2f892 fcl-passrc: resolver: allow passing a string/char to an array of char 
git-svn-id: trunk@45293 -
 2020-05-06 19:02:27 +00:00
yury
40504a6f9d * If a nested procedure does not access its parent's frame pointer, optimize it by removing the hidden $parentfp parameter. 
* Improved the tisogoto1.pp test.

git-svn-id: trunk@45292 -
 2020-05-06 14:43:49 +00:00
yury
c1d124d497 * x86: Fixed peephole optimization introduced in r44233. tb0219 and tb0548 tests have failed with -O2 since then. 
* Added variants of the tb0219 and tb0548 tests with forced -O2.

git-svn-id: trunk@45291 -
 2020-05-06 14:18:44 +00:00
nickysn
75ce122d36 - removed commented out writeln 
git-svn-id: trunk@45290 -
 2020-05-06 03:24:15 +00:00
nickysn
616cb38292 * fixed the TRelocDataInt to avoid truncating 16-bit addresses to 8-bit on 8-bit CPUs 
git-svn-id: trunk@45289 -
 2020-05-06 02:52:28 +00:00
nickysn
4aba225c8b + fix for writing absolute relocations in the .rel format 
git-svn-id: trunk@45288 -
 2020-05-06 01:57:38 +00:00
nickysn
bface9fd94 - reverted previous commit, since it was incorrect 
git-svn-id: trunk@45287 -
 2020-05-06 00:44:35 +00:00
nickysn
0caba1e84d + added internal error in taicpu.gencode.WriteNN to catch unhandled asm instructions 
git-svn-id: trunk@45286 -
 2020-05-06 00:38:55 +00:00
nickysn
997184778a + call ApplyAsmSymbolRestrictions for symbols that should be exported from ar files 
git-svn-id: trunk@45285 -
 2020-05-06 00:22:22 +00:00
nickysn
0d402a1341 + support signed 8-bit immediate constants in the Z80 internal asm writer as well 
git-svn-id: trunk@45284 -
 2020-05-06 00:13:10 +00:00
nickysn
11a7b8592f + support instructions like BIT, SET and RES in the Z80 internal asm writer 
git-svn-id: trunk@45283 -
 2020-05-06 00:10:17 +00:00
nickysn
6764056eff + support the 'in A,(n)' and 'out (n),A' instrunction in the Z80 internal asm writer 
git-svn-id: trunk@45282 -
 2020-05-05 23:58:54 +00:00
nickysn
c81f433795 + Z80: support conditional JR 
git-svn-id: trunk@45281 -
 2020-05-05 23:49:41 +00:00
nickysn
b164f5aa65 + support relative jumps in the Z80 internal asm writer 
git-svn-id: trunk@45280 -
 2020-05-05 23:42:09 +00:00
nickysn
0a09359906 + support the RST instruction in the Z80 internal asm writer 
git-svn-id: trunk@45279 -
 2020-05-05 23:30:44 +00:00
nickysn
be26429159 * preserve the actual file size (before aligning it to even bytes), when adding files to .a archives 
git-svn-id: trunk@45278 -
 2020-05-05 23:16:07 +00:00
nickysn
6422e9a803 + align files in generated .a files not by #0, but by #10 (Line Feed). This is 
compatible with GNU ar and others, and fixes linking with sdcc-sdld.

git-svn-id: trunk@45277 -
 2020-05-05 23:12:52 +00:00
nickysn
381be050a5 + support creating ar files in the Z80 internal obj writer 
git-svn-id: trunk@45276 -
 2020-05-05 23:05:37 +00:00
nickysn
43686720c3 + fix for conditional JP in the Z80 internal asm writer 
git-svn-id: trunk@45275 -
 2020-05-05 22:45:40 +00:00
nickysn
3e14eddaf6 + support conditional operations in the Z80 internal asm 
git-svn-id: trunk@45274 -
 2020-05-05 22:42:21 +00:00
nickysn
58d6d64fba + Z80 internal asm: support OT_REF_ADDR16 in taicpu.gencode.WrinteNN 
git-svn-id: trunk@45273 -
 2020-05-05 22:30:49 +00:00
nickysn
4fed57adc1 + lots of fixes to the Z80 internal asm writer 
git-svn-id: trunk@45272 -
 2020-05-05 22:18:44 +00:00
yury
7dc6049de9 * Release registers which have been used for a function call before adjusting the stack pointer. On i386 this allows to use eax,ecx,edx in POP instructions for stack adjustment. 
git-svn-id: trunk@45271 -
 2020-05-05 21:56:34 +00:00
florian
a4695a7015 * xtensa-embedded: fix setting of the fpu and abi 
git-svn-id: trunk@45270 -
 2020-05-05 20:41:36 +00:00
nickysn
3ab5acccb1 * the parameter of WriteWord should be word, not byte :) 
git-svn-id: trunk@45269 -
 2020-05-05 20:35:08 +00:00
nickysn
5193e8332c + also write the relocations in the .rel internal obj writer 
git-svn-id: trunk@45268 -
 2020-05-05 19:51:44 +00:00
pierre
f2b924573a Do not use inherited first_int_to_real when arm FPU_HAS_FPA is in fpu_capabilities 
git-svn-id: trunk@45267 -
 2020-05-05 12:25:18 +00:00
pierre
df275152c2 Add -Wp option description for riscv32 and xtensa compiler 
git-svn-id: trunk@45266 -
 2020-05-05 12:21:21 +00:00
pierre
1b5ee0d063 * Put all code adding cs_fp_emulation by default inside one big 
{$ifdef cpufpemu}
  * Add system_arm_freertos and system_xtena_linux to the list
    of systems that automatically add cs_fp_emulation to 
    init_settings.moduleswitches.
  + Do not use controller specfic default fputype for xtensa-linux 
    target that does not support use of -Wp option to set controller type.

git-svn-id: trunk@45265 -
 2020-05-05 12:20:21 +00:00
michael
a03ea37cfc * CeateArray uses 0-based loop 
git-svn-id: trunk@45264 -
 2020-05-05 09:52:02 +00:00
nickysn
0d11b5bf29 + added method TRelRelocation.EncodeFlags that encodes the flags to string that can be included in the .rel file 
git-svn-id: trunk@45263 -
 2020-05-05 03:23:51 +00:00
nickysn
03acadaf1e + initialize size and relflags in TRelRelocation 
git-svn-id: trunk@45262 -
 2020-05-05 03:03:02 +00:00
nickysn
732f1d9df6 + added TRelRelocationFlags 
git-svn-id: trunk@45261 -
 2020-05-05 01:13:58 +00:00
nickysn
569c406116 + introduced the TRelRelocation class 
git-svn-id: trunk@45260 -
 2020-05-05 00:59:27 +00:00
nickysn
f1f819516e + write the section data in the .rel internal object writer (relocations aren't written, yet) 
git-svn-id: trunk@45259 -
 2020-05-05 00:06:11 +00:00
florian
724676db43 * Xtensa: patch by Christo Crause: fix addmi/addi handling, resolves #37015 
git-svn-id: trunk@45258 -
 2020-05-04 19:58:45 +00:00
Jonas Maebe
0fbb1b259e * re-added "protected" accidentally removed in r45236, fixes JVM compilation 
(mantis #37016)

git-svn-id: trunk@45257 -
 2020-05-04 17:08:00 +00:00
michael
2073e518cc * Better uses clause for Delphi, less warnings 
git-svn-id: trunk@45252 -
 2020-05-04 09:54:39 +00:00
nickysn
ab878adfff + actually produce relocations in TRelObjData.writeReloc 
git-svn-id: trunk@45251 -
 2020-05-04 02:31:19 +00:00
nickysn
256597be58 + Z80 internal asm: produce correct opcodes for register operands 
git-svn-id: trunk@45250 -
 2020-05-04 02:17:30 +00:00
nickysn
90ee079cd1 + partial implementation of pass2 asm opcode generation for the Z80 internal asm writer 
git-svn-id: trunk@45249 -
 2020-05-04 01:27:44 +00:00
nickysn
5d2be4da1c * Z80: match both signed and unsigned 16-bit constants as OT_IMM16 in the asm instab lookup 
git-svn-id: trunk@45248 -
 2020-05-04 00:20:50 +00:00
nickysn
27e9dde81a + implemented pass1 (calcsize) of the instruction encoding for the Z80 internal asm 
git-svn-id: trunk@45247 -
 2020-05-04 00:14:28 +00:00
nickysn
23fa725b01 + added the global symbols to the .rel output file 
git-svn-id: trunk@45246 -
 2020-05-03 23:23:24 +00:00
nickysn
bba56d627f + write the areas (sections) in the .rel output 
git-svn-id: trunk@45245 -
 2020-05-03 23:16:23 +00:00