florian
8dcf4e62b7
* FCVT.W.D returns only a 32 bit int
2024-08-17 18:24:16 +02:00
florian
a736a4bba7
+ set pi_do_call on RiscV as well if we check for fpu exceptions
2024-02-16 22:48:14 +01:00
florian
b3ed34592f
+ software handling of exceptions on arm
...
* reworked software handling of exceptions so they can be check lazily
git-svn-id: trunk@42525 -
2019-07-28 21:06:36 +00:00
Jeppe Johansen
a1a17447ff
- Fix bug in 64bit softfloat double negation.
...
- Clean up handling of CPU/FPU type handling in RISCV.
- Do more fixes to get RISCV32 working.
- Fix most soft multiplication handling for generic RISCV code. Still missing a few.
- Add RISCV embedded targets.
git-svn-id: trunk@42335 -
2019-07-07 11:32:27 +00:00
Jeppe Johansen
29ea4ed07d
Add rounding mode operands.
...
Add support for trunc and round methods.
git-svn-id: branches/laksen/riscv_new@39698 -
2018-09-01 19:48:44 +00:00
florian
999cbd94b8
+ support to generate software based floating point exception checking
...
(enabled by -CE)
git-svn-id: branches/laksen/riscv_new@39639 -
2018-08-19 10:56:47 +00:00
Jeppe Johansen
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
...
git-svn-id: branches/laksen/riscv_new@39474 -
2018-07-20 08:21:15 +00:00
