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Author SHA1 Message Date
nickysn
c948485587 + enabled the 320x200 ModeX support in the graph unit for i8086-msdos 
git-svn-id: trunk@25676 -
 2013-10-06 09:29:33 +00:00
nickysn
dbc851eda3 + enabled the 320x200x256c VGA mode in the graph unit for i8086-msdos 
git-svn-id: trunk@25675 -
 2013-10-06 09:08:56 +00:00
nickysn
009037f9d9 * the Seg0040, SegA000, SegB000 and SegB800 constants changed to typed constants 
for Borland Pascal 7 compatibility. This allows doing e.g. 'mov es, [SegA000]'
  in inline asm, which is BP7 compatible, but would produce a wrong result
  if SegA000 was an untyped constant.

git-svn-id: trunk@25674 -
 2013-10-06 09:07:55 +00:00
nickysn
9ed0d6d40d * updated ppudump after r25672 
git-svn-id: trunk@25673 -
 2013-10-06 00:45:03 +00:00
nickysn
f165cee058 + save the absolute variable's segment to the ppu file after r25666 
* incremented the ppu version

git-svn-id: trunk@25672 -
 2013-10-06 00:32:10 +00:00
nickysn
3b895ec0e8 * updated tppufile.getaword to support 16-bit and 8-bit aword sizes 
git-svn-id: trunk@25671 -
 2013-10-06 00:20:42 +00:00
nickysn
8574642a1f + added and enabled compilation of unit printer for i8086-msdos 
git-svn-id: trunk@25670 -
 2013-10-06 00:14:08 +00:00
nickysn
0c2e8db579 + enabled compilation of unit charset for i8086-msdos 
git-svn-id: trunk@25669 -
 2013-10-05 23:55:34 +00:00
nickysn
3a09ca7924 * the longints in VLine16 converted to 16-bit 
git-svn-id: trunk@25668 -
 2013-10-05 22:32:08 +00:00
nickysn
77dc18007d * ScrWidth changed back to absolute, since the compiler has been fixed to support it 
git-svn-id: trunk@25667 -
 2013-10-05 22:24:44 +00:00
nickysn
f2763b98fa + implemented absolute seg:ofs vars on i8086 
git-svn-id: trunk@25666 -
 2013-10-05 22:16:33 +00:00
svenbarth
32a18199c5 Print aX or aregX for address registers if DEBUG_REGISTERLIFE is defined. 
rgobj.pas, trgobj.generate_interference_graph:
  * pass "regtype" instead of "R_INTREGISTER" to newreg so that "aX" or "aregX" is print for address registers

git-svn-id: trunk@25665 -
 2013-10-05 21:48:28 +00:00
svenbarth
c48d572996 Implement support for saving and restoring address registers. 
cgobj.pas, tcg:
  * g_save_registers: add the amount of used address registers to size as well
  * g_save_registers: save all used address registers
  * g_restore_registers: restore all stored address registers
m68k/cpubase.pas:
  * rename saved_standard_address_registers to saved_address_registers
all other platform's cpubase.{inc,pas} (except alpha, ia64 and vis which are not up to date):
  * add a saved_address_registers variable with one entry of RS_INVALID

At least a "make fullcycle" did complete.

git-svn-id: trunk@25664 -
 2013-10-05 21:43:42 +00:00
svenbarth
b1d79494dd Fix around 30 tests by using a volatile register for restoring the stack pointer 
m68k/cgcpu.pas, tcg68k.g_proc_exit:
  * use A0 (which is a volatile register) instead of A3 (which is not) to restore the stack pointer

git-svn-id: trunk@25663 -
 2013-10-05 21:32:27 +00:00
nickysn
9a1018ec57 + enabled the MCGA and 16-colour VGA modes in the graph unit for i8086-msdos 
git-svn-id: trunk@25662 -
 2013-10-05 21:25:50 +00:00
pierre
8a0dccf590 NetBSD getcwd system call also returns string length 
git-svn-id: trunk@25661 -
 2013-10-05 21:23:47 +00:00
nickysn
6bf7072a33 + enabled the EGA modes in the graph unit for i8086-msdos 
git-svn-id: trunk@25660 -
 2013-10-05 21:15:42 +00:00
marco
274ad65477 * IPicture from #25147. Translated IPicture2 (win64 safe) myself. (roughly the same but with 64-bit handle type) 
git-svn-id: trunk@25659 -
 2013-10-05 20:43:09 +00:00
nickysn
836ec24fb1 + enabled the Hercules code in the i8086-msdos graph unit 
git-svn-id: trunk@25658 -
 2013-10-05 19:18:11 +00:00
nickysn
54a34391a1 * rewritten the EGA/VGA detection code to use intr, instead of inline asm 
git-svn-id: trunk@25657 -
 2013-10-05 18:55:25 +00:00
nickysn
05be9829dc * finished the implementation of SaveStateVGA and RestoreStateVGA 
git-svn-id: trunk@25656 -
 2013-10-05 18:42:29 +00:00
nickysn
55f1b860af * SaveStateVGA and RestoreStateVGA rewritten to use intr 
git-svn-id: trunk@25655 -
 2013-10-05 18:06:44 +00:00
svenbarth
20587d8547 And another place where I forgot to (de)allocate address registers... 
m68k/cgcpu.pas, tcg68k.call_rtl_mul_const_reg & tcg68k.call_rtl_mul_reg_reg:
  * (de)allocate address registers

git-svn-id: trunk@25654 -
 2013-10-05 17:53:06 +00:00
svenbarth
f8fe25f8cf Forgot to commit one location where address registers need to be allocated. 
m68k/n68kmat.pas, tm68kmoddivnode.call_rtl_divmod_reg_reg:
  * (de)allocate address registers

git-svn-id: trunk@25653 -
 2013-10-05 17:50:12 +00:00
nickysn
896cdc42e5 * windows detection on startup rewritten to use intr 
git-svn-id: trunk@25652 -
 2013-10-05 17:48:05 +00:00
Károly Balogh
55be015a4e better version of the ColdFire TST.L 123(dX) fix, fixes regressions in tcnvint1 and 2 
git-svn-id: trunk@25651 -
 2013-10-05 16:52:39 +00:00
nickysn
bff9afe865 + added msdos to AllSmartLinkLibraryOSes 
git-svn-id: trunk@25650 -
 2013-10-05 12:42:14 +00:00
nickysn
f1c1ea17fa * updated TTarget.GetUnitLibFileName according to the settings for staticlibext 
and staticlibprefix for each target, supported by FPC

git-svn-id: trunk@25649 -
 2013-10-05 12:41:08 +00:00
florian
73e6af4864 + cpu flag CPUARM_HAS_THUMB_IDIV 
* test for CPUARM_HAS_THUMB_IDIV instead the CPU type when creating sdiv/udiv code

git-svn-id: trunk@25648 -
 2013-10-05 12:38:55 +00:00
florian
8fb7cf822b * unified internal errors 
git-svn-id: trunk@25647 -
 2013-10-05 12:37:46 +00:00
florian
9cb5212378 * patch by Anton Rieckert: cpu_armv7em should default to thumb(2) code as well, resolves #25142 
git-svn-id: trunk@25646 -
 2013-10-05 12:37:06 +00:00
nickysn
a19a9ef9cc + added a TOS parameter to TTarget.GetUnitLibFileName 
- rm the TTarget.UnitLibFileName property, as GetUnitLibFileName is now a
  function of TOS

git-svn-id: trunk@25645 -
 2013-10-05 12:13:11 +00:00
nickysn
1bea98995b * regenerated fpcmake makefiles after r25642 
git-svn-id: trunk@25644 -
 2013-10-05 10:11:27 +00:00
nickysn
8844c67f56 * updated fpcmake revision.inc after r25642 
git-svn-id: trunk@25643 -
 2013-10-05 10:06:14 +00:00
nickysn
d89c286dc1 * changed the staticlibext for i8086-msdos to .a in fpcmake.ini as well 
git-svn-id: trunk@25642 -
 2013-10-05 10:05:03 +00:00
nickysn
96a4f8e43b * the staticlibext for i8086-msdos changed from .lib to .a; rationale: 
1) less special cases needed in fpmkunit for i8086-msdos
  2) consistency with the naming scheme on the go32v2 target
  3) we didn't follow the DOS naming scheme completely anyway, e.g. we used .o
     for object files, instead of .obj

git-svn-id: trunk@25641 -
 2013-10-05 10:01:59 +00:00
marco
6ace630c6f * fix for #24947, writing index expression of property. Patch by Daniel Gaspary. 
git-svn-id: trunk@25640 -
 2013-10-04 21:37:52 +00:00
marco
bca1e53840 * fix for mantis #24920 try to properly update messages unit for win64. 
git-svn-id: trunk@25639 -
 2013-10-04 18:24:16 +00:00
nickysn
8f8bd8b12d - rm the unnecessary jnz instruction before the rep stosb in the i8086-msdos startup code, because the rep prefix checks for cx=0 and skips the stosb instruction anyway 
git-svn-id: trunk@25638 -
 2013-10-04 13:36:24 +00:00
Károly Balogh
6c0581da49 * do not emit TST.L #ofs(dX) instructions for the Coldfire 
fixes an assembler error while compiling packages/fpgtk/src/fpgtk.pp for the Coldfire

git-svn-id: trunk@25637 -
 2013-10-04 11:31:58 +00:00
Károly Balogh
584e3638ab * get the count of params from the correct list 
this fixes varargs a bit, particularly fixes an unhandled TList bounds exception while compiling packages/fcl-base/src/eventlog.pp

git-svn-id: trunk@25636 -
 2013-10-04 11:24:20 +00:00
nickysn
608a449c4a + added a 'cld' before the first string x86 instruction in the i8086-msdos startup code 
git-svn-id: trunk@25635 -
 2013-10-04 11:18:47 +00:00
nickysn
826b4678f3 * moved UpdateAlignmentStr, UpdateOptimizerStr, UpdateWpoStr and UpdateDebugStr from unit globals to unit dirparse 
git-svn-id: trunk@25634 -
 2013-10-04 08:26:02 +00:00
svenbarth
235c06ab34 Implement volatile address registers. Fixes quite some tests, but also breaks others... (overall more are fixed than are broken :) ) 
paramgr.pas, tparamanager:
  + add virtual get_volatile_registers_address method which by default returns an empty set
cgobj.pas, tcg:
  * allocallcpuregisters: also allocate address registers if needed
  * deallocallcpuregisters: also deallocate address registers if needed
ncgcal.pas, tcgcallnode.pass_generate_code:
  * (de)allocate address registers
  * keep result from being deallocated if it should be an address register (currently by no architecture...)
m68k/cpupara.pas, tm68kparamanager:
  + get_volatile_registers_address: return a0 and a1 as volatile registers
m68k/n68kmat.pas, tm68kmoddivnode.call_rtl_divmod_reg_reg:
  * (de)allocate address registers

git-svn-id: trunk@25633 -
 2013-10-03 20:33:11 +00:00
svenbarth
29ff548c0b Revert some additions of add_move_instruction as this heavily breaks code when the frame pointer is involved 
git-svn-id: trunk@25632 -
 2013-10-03 18:58:38 +00:00
svenbarth
dd204f395d m68k: add a few more add_move_instruction to tcg68k 
git-svn-id: trunk@25631 -
 2013-10-03 14:36:08 +00:00
svenbarth
03623c6c1a Forgot to commit that I moved tcgsize2opsize from cgcpu to cpubase. 
git-svn-id: trunk@25630 -
 2013-10-03 14:34:54 +00:00
nickysn
119cf760eb * UpdateTargetSwitchStr moved to a new unit dirparse.pas. This avoids the dependence of unit scandir on unit options 
git-svn-id: trunk@25629 -
 2013-10-03 12:21:33 +00:00
svenbarth
8e60465eb4 Fix the last failing tcnvint test (plus another one) by using comparisons that are not necessarily 32-bit. 
m68k/n68kadd.pas, tn68kadd.second_cmpordinal:
  * use the size of the largest operand to select a fiting operand
  * ToDo: check whether a sign/zero extend of the value is necessary

git-svn-id: trunk@25628 -
 2013-10-03 11:59:25 +00:00
sergei
5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 
git-svn-id: trunk@25627 -
 2013-10-03 08:08:04 +00:00