Commit Graph

98 Commits

Author SHA1 Message Date
J. Gareth "Curious Kit" Moreton
2dc0995067 - Bug fix to new ADD/SUB optimisation where conditions are concerned
- Register allocation fixes for overflow checks
2021-11-17 20:18:57 +00:00
florian
74d145bb16 * simplify tcgunaryminusnode.second_integer
git-svn-id: trunk@47154 -
2020-10-22 21:25:36 +00:00
florian
28f25b2df0 * reworked usage of tcgnotnode.handle_locjump
git-svn-id: trunk@46275 -
2020-08-05 21:15:32 +00:00
Jonas Maebe
1e3f72403e * renamed getintparaloc to getcgtempparaloc
o it can be used for more than integer parameters

git-svn-id: trunk@43781 -
2019-12-24 22:12:25 +00:00
Jeppe Johansen
a1a17447ff - Fix bug in 64bit softfloat double negation.
- Clean up handling of CPU/FPU type handling in RISCV.
- Do more fixes to get RISCV32 working.
- Fix most soft multiplication handling for generic RISCV code. Still missing a few.
- Add RISCV embedded targets.

git-svn-id: trunk@42335 -
2019-07-07 11:32:27 +00:00
Jonas Maebe
04d295f186 * first step towards supporting 32 bit targets with the LLVM code generator:
use the generic code in more cases when cpuhighleveltarget is defined

git-svn-id: trunk@41133 -
2019-01-29 21:39:09 +00:00
Jonas Maebe
4d03f3a65e * fixed LLVM memory leaks
git-svn-id: trunk@40732 -
2019-01-01 16:22:31 +00:00
florian
8c5606b41d + support mmx shifting
git-svn-id: trunk@38367 -
2018-02-27 21:40:12 +00:00
florian
b1dff29cbf * removed unused units
git-svn-id: trunk@36165 -
2017-05-09 19:53:14 +00:00
nickysn
0b1a54f924 * on 16-bit CPUs, avoid the unnecessary 32-bit conversion of the right shl/shr
parameter, when the operation is 32-bit (even when the operation is 32-bit,
  the shift count is only 16-bit on 16-bit CPUs, so using 32-bits is wasting an
  extra register and an extra instruction to initialize it)

git-svn-id: trunk@35733 -
2017-04-04 21:01:20 +00:00
Jonas Maebe
8ff5371a6c + support mmregisters in the generic unaryminus code for floats
git-svn-id: trunk@31655 -
2015-09-12 23:33:50 +00:00
Jonas Maebe
0fc1fd6ac1 * replaced current_procinfo.currtrue/falselabel with storing the true/false
labels of LOC_JUMP in the node's location. This generates some extra jumps
    for short circuit boolean and/or-expressions if optimizations are off, but
    with optimisations enabled the generated code is the same (except for JVM
    because the jump threading optimisation isn't enabled there yet).

git-svn-id: trunk@31431 -
2015-08-27 18:28:57 +00:00
Jonas Maebe
61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm)
git-svn-id: trunk@30429 -
2015-04-04 14:29:16 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095
git-svn-id: branches/hlcgllvm@30101 -
2015-03-05 20:32:15 +00:00
Jonas Maebe
9f929695cf * fixed tcgshlshrnode.pass_generate_code for 64 bit targets
o also removed 16 bit ifdefs, replacing them with regular
     if's

git-svn-id: trunk@29582 -
2015-01-30 19:31:15 +00:00
sergei
5f2821ee5f * Moved handling of emulated floating point negation into new virtual method tcgunaryminusnode.second_float_emulated. Also changed it into simple flipping of the sign bit, which is how it is defined by IEEE 754, and already done for ARM targets. Relevant ARM-specific parts can now be removed, and m68k code gets significantly better without further efforts.
git-svn-id: trunk@28528 -
2014-08-27 21:16:30 +00:00
Jonas Maebe
bacd303208 * synchronized with trunk up to r27758
git-svn-id: branches/hlcgllvm@27779 -
2014-05-12 16:12:34 +00:00
nickysn
63f0731913 * 16/8-bit alu fix in tcgunaryminusnode.emit_float_sign_change
git-svn-id: trunk@27672 -
2014-04-26 18:58:22 +00:00
nickysn
88df284423 * fixed overflow checking for the 64-bit unary minus on 16 and 8-bit platforms
git-svn-id: trunk@27653 -
2014-04-25 12:33:45 +00:00
Károly Balogh
075645d2b3 do not generate zero divisor checks if a divisor is a constant
git-svn-id: trunk@27082 -
2014-03-10 18:16:17 +00:00
Jonas Maebe
fcbde1d6e9 + hlcg/llvm support for unary minus
o converted tcgunaryminusnode.emit_float_sign_change() to use a tdef instead
     of tcgsize

git-svn-id: branches/hlcgllvm@27002 -
2014-03-06 21:41:36 +00:00
Jonas Maebe
81427523ab * pass a list of (pointers to) the paralocs to hlcgobj.a_call/g_call*, as
required for the LLVM support (LLVM parameter support is not yet
    included)
  * always return the function return loc from a_call*, again as required
    for the LLVM support

git-svn-id: branches/hlcgllvm@26992 -
2014-03-06 21:40:57 +00:00
Jonas Maebe
5729c9c8ef * fixed shl/shr with constant value>=32 on 64 bit platforms
git-svn-id: trunk@26809 -
2014-02-18 16:46:36 +00:00
Jonas Maebe
7033ddf679 * converted tshshrnode to thlcgobj
o make sure that the return register has the correct size

git-svn-id: trunk@26808 -
2014-02-18 16:46:29 +00:00
florian
07579cf0b7 * cleanup
git-svn-id: trunk@26798 -
2014-02-16 13:15:16 +00:00
florian
3dddd01309 * do not location_force_reg in tcgshlshrnode.second_integer if left is already in a register
git-svn-id: trunk@26797 -
2014-02-16 13:15:13 +00:00
sergei
36d0c8a5a7 * x86 and SPARC: fixed handling 64-bit (qwordbool) values in tcgnotnode (partial fix for Mantis #25255).
* Moved handling LOC_JUMP locations to helper method of base class, it appears to be the same for all targets.

git-svn-id: trunk@26353 -
2014-01-02 10:29:44 +00:00
nickysn
988b742d71 * avoid the meaningless conversion of the right shl/shr argument to 32-bit on
i8086 in the cases when the left argument is 32-bit.

git-svn-id: trunk@26349 -
2014-01-01 19:03:17 +00:00
florian
4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables
git-svn-id: trunk@26161 -
2013-12-01 17:02:08 +00:00
nickysn
cb81153cc4 * fixed tcgnotnode.second_64bit for 8/16-bit cpus after r24678
git-svn-id: trunk@24719 -
2013-06-01 14:05:53 +00:00
florian
44a7ef600f * improve register handling for not and unary minus operator by using a new register for the destination
git-svn-id: trunk@24678 -
2013-05-31 21:32:58 +00:00
nickysn
a5c5b05362 * initial support for system procs that use calling conventions that push left to right on i8086 or i386
git-svn-id: branches/i8086@24282 -
2013-04-21 13:26:12 +00:00
nickysn
4e640511fb * tcgunaryminusnode.second_64bit fixed for < 32-bit CPUs
git-svn-id: branches/i8086@23810 -
2013-03-12 16:27:26 +00:00
nickysn
48bba896a5 * cpu16bitalu fixes in tcgshlshrnode.second_integer
git-svn-id: branches/i8086@23791 -
2013-03-11 16:13:25 +00:00
nickysn
588b12200b 16-bit ALU fix in tcgunaryminusnode.second_integer
git-svn-id: branches/i8086@23745 -
2013-03-09 15:13:08 +00:00
Jonas Maebe
39f46d8350 * restored accidentally removed call to fpc_handleerror in r23325
git-svn-id: trunk@23330 -
2013-01-06 19:46:21 +00:00
Jonas Maebe
69c29a415f * pass the procdef to getintparaloc instead of only the proccalloption, so
that the type of the parameters can be determined automatically
   o added compilerproc declarations for all helpers called in the compiler
     via their assembler name, so we can look up the corresponding procdef

git-svn-id: trunk@23325 -
2013-01-06 15:05:40 +00:00
florian
5e1e42ec2b * fixes support for cpus with cpunodefaultint for unary minus nodes
git-svn-id: trunk@22838 -
2012-10-23 20:27:07 +00:00
Jonas Maebe
1adeec6212 * fixed unaryminus overflow check for high level targets (call helper via
hlcg, and use compproc name)
  * fixed unaryminus overflow check for targets that use the generic code
    for both 32 and 64 bit integers even if their "native" integer size
    is 32 bit (by not checking against low(aint), but opsize.low)

git-svn-id: trunk@22807 -
2012-10-21 17:56:28 +00:00
florian
1c8c2d6dbb * tcgshlshrnode.second_integer: don't load the right expression into a register if it is already a LOC_CREGISTER
git-svn-id: trunk@22307 -
2012-09-04 10:43:48 +00:00
Jonas Maebe
7a0ae38700 + also specify the parameter def when allocating a parameter via
getintparaloc + adapted all call sites of getintparaloc. This
    led to a number of additional, related changes:
   o corrected the type information for some getintparaloc parameters
   o don't allocate some intparalocs in cases they aren't used
   o changed "const tvardata" parameter into "constref tvardata" for
     fpc_variant_copy_overwrite to make pass-by-reference semantics
     explicit
   o moved a number of routines that now have to call find_system_type()
     from cgobj to hlcgobj so that cgobj doesn't have to start depending
     on the symtable unit
   o added versions of the cpureg alloc/dealloc methods to hlcgobj that
     call through to their cgobj counter parts, so we can call save/restore
     the cpu registers before/after calling system helpers from hlcgobj
     (not implemented in hlcgobj itself, because all basic register
      allocator functionality is still part of cgobj/cgcpu)

git-svn-id: trunk@21696 -
2012-06-24 15:02:12 +00:00
Jonas Maebe
edd42aa42a * moved subsetref/reg and bit_set/test support from cgobj to hlcgobj for
future use by high level code generator targets
   o this in turn required that all a_load*_loc* methods are called via
     hlcg rather than via cg, since a location can be a subsetref/reg and
     and those are no longer handled in tcg
   o that then required moving several force_location_* routines into
     thlcg because they use a_load_loc*, but did not take tdef size
     parameters (which are required by the thlcg a_load_loc* routines)
   o the only practical consequence is that from now on, you have to
     use hlcg.location_force_mem/reg() (fpureg not yet) and
     hlcg.gen_load_loc_cgpara() instead of the removed versions from ncgutil,
     and hlcg.a_load*loc*() instead of cg.a_load*loc* if a subsetref/reg
     might be involved

git-svn-id: trunk@21287 -
2012-05-13 12:33:10 +00:00
Jonas Maebe
80a63197e3 + support for unaryminus for the JVM target (integer via generic code, float
JVM-specific code)

git-svn-id: branches/jvmbackend@18512 -
2011-08-20 08:06:05 +00:00
Jonas Maebe
4c152ccb7d * converted tcgnotnode.second_integer() to hlcg
git-svn-id: branches/jvmbackend@18509 -
2011-08-20 08:05:48 +00:00
florian
8d960cb608 + implementation of shifting operations for avr
* handle shl/shr operand size correctly

git-svn-id: branches/avr@17109 -
2011-03-09 19:48:01 +00:00
florian
26fbfaf5a7 + introduce the usage of asizeint/asizeuint for cpus with sizeof("alu")<>sizeof(pointer)
git-svn-id: trunk@17011 -
2011-02-26 20:10:03 +00:00
mazen
b127fc154a * Fixed spell error revealed by lintian.
git-svn-id: trunk@16094 -
2010-10-06 20:33:57 +00:00
Jonas Maebe
283018a3bf * changed tprocdef.funcretloc[] from a tlocation into a tcgpara so it can
represent complex locations (required for full x86-64 ABI support,
    which is not yet implemented) -> lots of special result handling
    code has been removed and replaced by the parameter handling
    routines
  + added support for composite parameters (and hence function
    results) to tcg.a_load_ref_cgpara() (so it can be used for
    handling, e.g., 64 bit parameters on 32 bit platforms)
  * the above fixed writing past the end of allocated memory when
    handling records returned in registers on x86-64 whose size is
    not a multiple of 8 bytes (mantis #16357)
  - removed the x86-64 and PPC specific versions of a_load_ref_cgpara(),
    as they are now handled correctly by the generic version
  * moved the responsibility of allocating tcgpara cpu registers
    (using paramanager.allocparaloc()) from the callers of
    cg.a_load*_cgpara() to the cg.a_load*_cgpara() methods
    themselves (so the register allocation can be done efficiently
    when dealing with function results)
  * for the above, renamed paramanager.alloc/freeparaloc() to
    paramanager.alloc/freecgpara(), and use paramanager.allocparaloc()
    to allocate individual pcgparalocations instead
  * fixed the register size of SSE2 function result registers for
    x86-64 (when used for floating point), which results in removing
    a few superfluous "movs? %xmm0,%xmm0" instructions
  * fixed compilation of paramanagers of avr, m68k and mips after r13695
    and also updated them for these new changes

git-svn-id: trunk@15350 -
2010-05-30 21:12:57 +00:00
Jonas Maebe
9bc15a5f61 * renamed a_param_* to a_load_*_cgpara
git-svn-id: trunk@15305 -
2010-05-22 09:07:21 +00:00
florian
0d57b2d8da * use 3 op cgobj methods when doing shl/shr code generation, this allows the cg to generate better code on risc archs having 3 operand shifts
git-svn-id: trunk@14487 -
2009-12-27 20:19:23 +00:00