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832ad67d63
Commit Graph

20297 Commits

Author SHA1 Message Date
florian
832ad67d63 * more adaptions for SPARC64 
git-svn-id: trunk@36381 -
 2017-05-31 20:59:21 +00:00
florian
b59e4f5652 + register .inc files for SPARC64 
git-svn-id: trunk@36380 -
 2017-05-31 20:58:30 +00:00
florian
188ec0f0c7 + basics for sparc64 support, we continue to use the name "sparc" for sparc32, both sparc are identified by sparcgen (dirs, defines etc.) 
git-svn-id: trunk@36374 -
 2017-05-30 21:17:17 +00:00
Károly Balogh
1252aefb86 t_linux: whitespace and tab 2 space fix. no functional change. 
git-svn-id: trunk@36370 -
 2017-05-29 16:11:24 +00:00
nickysn
5138d4e067 * fixed avr multiplication after r36344 
git-svn-id: trunk@36369 -
 2017-05-29 12:42:02 +00:00
florian
22956c4393 + TX86AsmOptimizer.OptPass1OP 
git-svn-id: trunk@36365 -
 2017-05-28 13:49:43 +00:00
florian
7c0f72d9af * avoid spill coalesce of registers with itself, resolves issue #31926 
git-svn-id: trunk@36363 -
 2017-05-28 08:59:57 +00:00
florian
991d962ae2 * more range check errors on 8 bit CPUs fixed 
git-svn-id: trunk@36362 -
 2017-05-28 08:59:55 +00:00
florian
a37237ca11 * avoid range check errors with absolute symbols for cpus where addresses are bigger than the registers 
git-svn-id: trunk@36361 -
 2017-05-28 08:59:53 +00:00
florian
8ea9e3d344 * avoid range check errors on avr 
git-svn-id: trunk@36360 -
 2017-05-28 08:59:51 +00:00
florian
344970879e * spill coalesce uses get_alias 
git-svn-id: trunk@36359 -
 2017-05-28 08:59:49 +00:00
Károly Balogh
f7488f2bd8 m68k: don't try to inline NaN and InF values as consts into FPU operands 
git-svn-id: trunk@36351 -
 2017-05-27 20:51:05 +00:00
Károly Balogh
b3157aa5ea m68k: generate MUL helpers for CPUs without 32bit MUL already in pass 1 
git-svn-id: trunk@36348 -
 2017-05-26 18:46:19 +00:00
Károly Balogh
b755524c38 made it possible to override the decision from the cgs, if a certain muln needs a helper 
git-svn-id: trunk@36347 -
 2017-05-26 18:42:21 +00:00
Károly Balogh
6ca8b1374b m68k: quickfix the 68000 builds of the compiler after r36344 
git-svn-id: trunk@36346 -
 2017-05-26 18:26:58 +00:00
nickysn
34113b930b * removed the checkoverflow: boolean parameter of the software mul helpers; 
replaced it with a separate "_checkoverflow" version of each helper

git-svn-id: trunk@36344 -
 2017-05-26 15:34:26 +00:00
Károly Balogh
87e8010f05 m68k: support 32x32 to 64bit MUL generation when targeting CPUs which support this instruction 
git-svn-id: trunk@36339 -
 2017-05-25 22:35:12 +00:00
Károly Balogh
63b3304374 m68k: instead of calling a helper, generate inlined code for 64 bit multiplications, when applicable 
git-svn-id: trunk@36336 -
 2017-05-25 20:59:12 +00:00
Károly Balogh
829b2fc3b3 m68k: enable 68020 codepaths to all CPUs supporting '020 features 
git-svn-id: trunk@36335 -
 2017-05-25 20:54:18 +00:00
Károly Balogh
e9ff684ff0 m68k: handle operand type correctly for 3 operand mul/div 
git-svn-id: trunk@36334 -
 2017-05-25 20:52:57 +00:00
Károly Balogh
aa87e911d7 m68k: fixed some copypaste error in a disabled debug string. no functional changes. 
git-svn-id: trunk@36329 -
 2017-05-25 15:12:28 +00:00
nickysn
fa645dcaf7 + added abs(smallint) and abs(shortint) for cpus with 8-bit or 16-bit alu 
git-svn-id: trunk@36327 -
 2017-05-25 14:14:18 +00:00
florian
db49b2f62b * coalesce spilled registers if possible to avoid mem->mem moves 
git-svn-id: trunk@36325 -
 2017-05-25 12:44:35 +00:00
florian
4b17ad80d0 * reduce initial size of movelist, 16 is enough for most cases 
git-svn-id: trunk@36324 -
 2017-05-25 12:44:33 +00:00
florian
5e07957594 + TLinkedList.RemoveAll 
git-svn-id: trunk@36323 -
 2017-05-25 12:44:32 +00:00
florian
c83e6991d5 * properly check number of operands 
git-svn-id: trunk@36322 -
 2017-05-25 12:44:30 +00:00
Károly Balogh
dd01b7ca8b fix a typo to hopefully fix the build 
git-svn-id: trunk@36312 -
 2017-05-23 21:13:00 +00:00
svenbarth
7c9aeda656 * rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR 
git-svn-id: trunk@36310 -
 2017-05-23 19:58:39 +00:00
svenbarth
fab6f70de8 * rework AVR's InsertInitFinalTable to make use of get_init_final_list instead of iterating the init/fini functions itself 
git-svn-id: trunk@36309 -
 2017-05-23 19:46:07 +00:00
svenbarth
29d9beb40c * initialize datatemp 
git-svn-id: trunk@36308 -
 2017-05-23 19:27:08 +00:00
svenbarth
72c595eefe + implement support for Insert() for dynamic arrays; the parameter that is inserted can be a dynamic or static array of the same type, an array constructor or a single element of the arrays type; all that is determined based on the second type 
+ added test

git-svn-id: trunk@36307 -
 2017-05-23 19:11:49 +00:00
Károly Balogh
a4c40a51ff m68k: also add options.pas to the previous change 
git-svn-id: trunk@36303 -
 2017-05-23 00:18:13 +00:00
Károly Balogh
3e8ee48458 m68k: define cpurox and enabled the rotate-related optimizations on CPUs which support rotate instructionsoptions.pas 
git-svn-id: trunk@36302 -
 2017-05-23 00:16:29 +00:00
yury
884cb758e7 * Ensure the number of operands is 2 for MOVXX instructions in OptPass1MOVXX. Otherwise the classic MOVSD/W/B no-operand instructions (REP MOVSX) cause AV during checks of operands. The AV is thrown when trying to compile ucomplex.pp with -Cfsse3. 
* Also fixed generation of debug comments in OptPass1MOVXX.

git-svn-id: trunk@36295 -
 2017-05-22 15:20:18 +00:00
yury
f37613ddd8 * Use .rodata and .data.rel.ro sections for Android with PIC. 
git-svn-id: trunk@36292 -
 2017-05-22 13:40:48 +00:00
Károly Balogh
1f7b6fbd9a m68k: implement frac inline nodes 
git-svn-id: trunk@36290 -
 2017-05-21 21:13:02 +00:00
Károly Balogh
7ed9b9f188 m68k: instead of the FPU, use CPU instructions to copy cgparas to stack 
git-svn-id: trunk@36289 -
 2017-05-21 21:09:47 +00:00
Jonas Maebe
744facb7fc * properly support accepting register parameters of assembler routines in 
the intel assembler reader: no longer parse them as register tokens,
    but as local operands that are later converted into registers. This
    ensures in particular that the type of the operand is set, which is
    necessary in case this operand later subscripted (as in tasm10a)

git-svn-id: trunk@36288 -
 2017-05-21 20:17:15 +00:00
Jonas Maebe
61af0fb72d * only take into account the location of the parameter at the callee side to 
determine whether it's in a register if it's a pure assembler routine
  * you can't "index" implicit pointers either using their fields

git-svn-id: trunk@36287 -
 2017-05-21 20:17:11 +00:00
florian
358bfb4858 * SSE4.1+ implementation of int(...) 
git-svn-id: trunk@36285 -
 2017-05-21 15:28:34 +00:00
florian
3c5ec4e76c * allocate register correctly for "MovMov2Mov 2" 
+ more debug messages
* debug message naming fixed

git-svn-id: trunk@36284 -
 2017-05-21 15:06:22 +00:00
florian
12dec14859 * try to break dependency chains when generating vsqrt instructions 
git-svn-id: trunk@36282 -
 2017-05-21 11:35:33 +00:00
florian
8eec29b139 + enable support for a processor specific frac function 
* implemented inlined frac support for CPUs with SSE4.1+

git-svn-id: trunk@36281 -
 2017-05-21 11:12:59 +00:00
florian
912e6d129a * fix modification flags for *ROUND* 
git-svn-id: trunk@36280 -
 2017-05-21 11:12:57 +00:00
florian
1ffdf02b94 + Ch_*Op4 
+ op_const_reg_reg_reg

git-svn-id: trunk@36279 -
 2017-05-21 11:12:55 +00:00
florian
54b5112284 * real constants should be propagated during inline expanding 
git-svn-id: trunk@36277 -
 2017-05-21 08:34:47 +00:00
florian
ddfaf59626 * fix compilation with -Cr 
git-svn-id: trunk@36276 -
 2017-05-21 08:34:42 +00:00
Jonas Maebe
e4dbd24a49 + inline trunc() support for the LLVM backend when using -Oofastmath (because 
the behaviour of LLVM's fptosi instruction is undefined in case of
    overflow)

git-svn-id: trunk@36275 -
 2017-05-20 19:28:15 +00:00
Jonas Maebe
9787c5dd82 * fix compilation of LLVM backend (mantis #31794) 
git-svn-id: trunk@36267 -
 2017-05-19 21:52:49 +00:00
Jonas Maebe
6dca851cb2 * set default LLVM version to 3.9.0 
git-svn-id: trunk@36266 -
 2017-05-19 21:52:45 +00:00