Commit Graph

65060 Commits

Author SHA1 Message Date
magorium
853b9c5c96 AROS: Unit amigados, record field members update
Update some amigados unit record field members for AROS compatiblity.

These changes reflect the changes made in the doslib RTL (that were present in
the previous commit).
2022-05-06 22:21:47 +00:00
magorium
94d47bf7cb AROS: RTL doslib, record field members update
Update some doslib RTL record field members for AROS compatiblity.
2022-05-06 22:21:47 +00:00
magorium
d207a293c7 AROS: 32/64-bit unit amigados compatibility update
Update some amigados record structures to be 32/64-bit compatible.

These changes reflect the changes made in the doslib RTL (that were present in
the previous commit) but note that some of Unit amigados' record structures
were already up to date.
2022-05-06 22:21:47 +00:00
magorium
b2f6ca70cd AROS: 32/64-bit RTL doslib compatibility update
Update some doslib RTL record structures to be 32/64-bit compatible.
2022-05-06 22:21:47 +00:00
magorium
2324055b1f AROS: Unit exec update. Memory sizes are IPTR
Memory sizes are expressed in IPTR/PtrUInt in order to be compatible to both
32 and 64-bit.

This changes some of Exec API call signatures and should not impact
existing code.

These changes reflect the changes made in the exec RTL (that were present in
the previous commit) but note that Unit Exec record structures were already
up to date.

See: d7df812342
2022-05-06 22:21:47 +00:00
magorium
e339d236e1 AROS: RTL exec update. Memory sizes are IPTR
Memory sizes are expressed in IPTR/PtrUInt in order to be compatible to both
32 and 64-bit.

Affects both record structures and API call signatures.

See: d7df812342
2022-05-06 22:21:47 +00:00
magorium
2a75debff6 AROS: 32/64-bit RTL exec compatibility update
Update some exec RTL record structures to be 32/64-bit compatible.

Unit Exec was already up-to-date with these changes.
2022-05-06 22:21:47 +00:00
magorium
61304bf324 AROS: Add stack aligned record fields for 32-bit and 64-bit compatibility
Final step that attempts to ensure that fields of particular records are
'STACKED' (stack aligned) properly for both 32 and 64 bit.

AROS introduced STACKED structure members, which are members that are padded
according to the current used stacksize which in itself is based on the target
CPU.

These structures are required to have a particular defined size in memory and
have a particular field alignment, therefor these records are always end-padded
(whether required or not) so that we are able to force the compiler to add
padding depending on the RECORDMIN setting.

Other available FPC directives and/or solutions seem currently not able to
solve that issue and we do not wish to manually check each structure to
determine if it requires end-padding or not (based on bitness) simply because
it is unmaintainable.

This change attempts to ensure that these record structures compile using the
correct memory size and field layout for both 32 and 64-bit CPU's.

The introduction of stack aligned record fields solves a lot of 64-bit related
crashes when working with native OOP such as MUI and BOOPSI.

Note: Not tested on big endian.
2022-05-06 22:00:27 +00:00
magorium
1fde206ee6 AROS: Change MethodID fields (back) to their original 32-bit (longword) size
Preparations for the introduction of stack aligned record fields (AROS STACKED
structure members).

MethodID really is 32-bit wide so we need to change those back to their
original size.
2022-05-06 22:00:27 +00:00
magorium
aa8fe28a05 AROS: Remove CPU64 ifdef's ensuring 64-bit compatibility for records/fields
Preparation for the introduction of stack aligned records fields (AROS STACKED
structure members).

Remove unmaintainable superfluous ifdef's that are used inside certain record
structures (in an attempt to use correct padding on 64-bit targets) because
they are not in line with the introduction of stack aligned record fields.
2022-05-06 22:00:27 +00:00
florian
c4e85e5d2c * made test compilable if no floating point type support is available 2022-05-06 23:25:36 +02:00
marcoonthegit
ca332f1002 * also remove .git dirs. 2022-05-06 18:44:57 +02:00
Michaël Van Canneyt
efe414f128 * Example for RSA signing 2022-05-06 10:47:19 +02:00
florian
bce88f2e2b * AVR: trgcpu.do_spill_read must load ofs 2022-05-05 19:35:38 +02:00
Michaël Van Canneyt
cab37732c4 * Avoid memory allocation in IsNullOrWhitespace. Fix issue #39702 2022-05-05 12:04:52 +02:00
Michaël Van Canneyt
beb97b8110 * Use const for string argument 2022-05-04 19:03:33 +02:00
Michaël Van Canneyt
12866e2e61 * Forgot to commit fix 2022-05-04 11:27:55 +02:00
Michaël Van Canneyt
82c27c72c9 * Do not make assumptions about string encoding 2022-05-04 10:00:38 +02:00
Michaël Van Canneyt
c6e9c7c1f8 * Change writeln+exit to ignore 2022-05-03 23:14:09 +02:00
mattias
3ecc1272e0 fcl-web: removed des3 encoded pem example 2022-05-03 23:02:23 +02:00
Pierre Muller
5acd7a7b83 Rename tsymtable.insert and delete methods to insertsym ands deletesym 2022-05-03 23:00:28 +02:00
mattias
8851c8968c fcl-web: added des3 encoded pem example 2022-05-03 22:52:23 +02:00
mattias
2ec59db2fa fcl-hash: fixed fptlsbigint on i386 2022-05-03 22:35:52 +02:00
florian
29881ee675 * for now, IO is not supported on AVR 2022-05-03 19:39:09 +02:00
mattias
36b4a77c94 fcl-hash: less hints and disable range checking for bigint 2022-05-03 19:20:58 +02:00
Ondrej Pokorny
2093be8fc3 db xmldatapacketreader: fix range check error in InitLoadRecords 2022-05-03 10:21:20 +00:00
Ondrej Pokorny
8a64bddb20 db testsuite: add TestMSSQLLargeStrings 2022-05-03 10:18:41 +00:00
Ondrej Pokorny
f57adee862 odbc: bind string parameters as SQL_WLONGVARCHAR only for more than 2000 characters 2022-05-03 10:18:41 +00:00
Michaël Van Canneyt
989b378bcd * Remove debug define 2022-05-03 12:06:04 +02:00
mattias
120303576b fcl-web: fpjwarsa: catch exceptions during verification 2022-05-03 01:51:56 +02:00
mattias
37d107a953 fcl-web: TJWTSignerPS256, TJWTSignerPS384, TJWTSignerPS512 2022-05-03 01:39:30 +02:00
ccrause
a6766d62ee Fix generation of default linker script for esp-idf v4.4 2022-05-02 21:18:40 +00:00
mattias
76e4e5d894 fcl-hash: started RSASSA_PSS_Verify 2022-05-02 22:38:52 +02:00
Michaël Van Canneyt
4df9da6c15 * Fix library name 2022-05-02 10:36:21 +02:00
mattias
0f30dad341 fcl-hash: started RSASSA_PSS_SIGN 2022-05-02 10:00:25 +02:00
mattias
de5c056ef3 fcl-hash: started RSASSA_PSS_SIGN 2022-05-02 00:54:05 +02:00
florian
f5742f21a0 * do not run test, it is about successful compilation and runtime on weak CPUs is high 2022-05-01 22:58:24 +02:00
florian
0ae45bd2cf + AVR: track flag usage
+ AVR: take care of allocated flags when spilling
  * AVR: trgcpu.do_spill_read might also use ADIW
2022-05-01 22:42:57 +02:00
florian
6d6774bcc4 * write number of iterations 2022-05-01 22:42:57 +02:00
florian
038230bbea * AVR: use adiw to create spilling constants if possible
* AVR: insert allocations for registers used by spilling so the assembler optimizer does not remove spilling code
2022-05-01 22:42:57 +02:00
florian
46b52d92d3 + AVR: helpers take care of ADIW 2022-05-01 22:42:57 +02:00
Michaël Van Canneyt
bcdc75cecf * Add license message 2022-05-01 22:22:38 +02:00
mattias
7d98462c1c fcl-hash: added PSS helper functions I2OSP, MGF1SHA256 2022-05-01 20:17:58 +02:00
mattias
a81e527e1d fcl-web: test writing rsa keys as DER, test with RFC 7515 values 2022-05-01 20:17:58 +02:00
mattias
727f019fd7 fcl-hash: init X509 key with strings, write as ASN and DER 2022-05-01 20:17:58 +02:00
mattias
727d606b45 fcl-hash: added some asn write functions 2022-05-01 20:17:58 +02:00
Michaël Van Canneyt
ddfe51415b * Ignore output programs 2022-05-01 16:22:55 +02:00
Michaël Van Canneyt
6c33e240ff * Ignore output programs 2022-05-01 16:09:56 +02:00
Michaël Van Canneyt
395851a554 * Ignore output programs 2022-05-01 16:08:29 +02:00
Michaël Van Canneyt
4afb8fad42 * Ignore output programs 2022-05-01 16:06:14 +02:00