* Using ot_mmxrm and ot_xmmrm operand types to match arguments, reduces number of required entries by half.
* Replaced all literal $66, $F2 and $F3 prefixes with control codes (\361, \334 and \333, respectively).
* Prefix control codes imply writing REX, so code \323 after them is no longer necessary, removed.
* Fixed technology flags (SSSE3, SSE4.1, SSE4.2)
- Removed codes \300 and \301 (intended to generate address size prefix). FPC does not support this feature (the prefix itself is generated, but process_ea rejects operands needing non-default address size). Probably we don't even need to support it. But if we do, a much simpler solution is check all operands, like today's NASM does.
* Fixed/added some instructions along the way, namely CRC32, UNPCKHPD, CMPNEQSD.
git-svn-id: trunk@17437 -
* AESKEYGENASSIST is not ATT-specific name, it is used by Intel-style assemblers as well. Also updated tests/test/taes1.pp to reflect the change.
+ Added SCASQ, resolves#16730 (other opcodes mentioned in that report were added/fixed earlier)
git-svn-id: trunk@17431 -
* disallow pushfd/popfd for x86_64 (mantis #14862)
* fixed assembling popfq with the internal assembler (it needs a rex.w
prefisx, while pushfq doesn't)
* changed the default opcode size of pushf/popf/pusha/popa in
{$asmmode intel} from "native size" to 16 bit (compatible with Intel
manuals and Kylix; in AT&T mode, the default size for those operations
remains the native one)
* changed pushf/popf in rtl/i386/* into pushfd/popfd because of the
previous change
git-svn-id: trunk@15546 -
* operand read/write info for movaps and movapd
* use "movapd reg,reg" instead of "movaps reg,reg" if appropriate
so the spilling code can spill the correct size to memory
* replace movaps/movapd with movss/movsd when spilling to memory
instead of movq
git-svn-id: trunk@4612 -
* cgcal: deallocate hlper register only after call statement (fixes bug
with "procedure of object" and optimizer reported to bugrep on
2001/08/30) ('merged')
