Commit Graph

68072 Commits

Author SHA1 Message Date
florian
7e69f399b3 * patch and test by Rika: fixes self inserts in Insert(x, dynarray) and improves Insert(x, dynarray), resolves #40417 2023-08-29 22:23:22 +02:00
Rika Ichinose
1c4151d82e Remake AdjustLineBreaks.
This version is correct and supposedly better in other ways (except for a bit of clarity maybe).
2023-08-29 20:08:03 +00:00
Henrique Gottardi Werlang
8ecdc6ed05 Allow constructor RTTI info in Pas2Js generated file. 2023-08-29 14:37:51 -03:00
Michaël Van Canneyt
9392e62935 * Trigger OnHeaders after responsestatuscode is set. Fixes issue #40419 2023-08-29 19:30:30 +02:00
Michaël Van Canneyt
148bde3f8f * Small improvement 2023-08-29 11:35:44 +02:00
Rika Ichinose
2536041230 Faster genset.inc:fpc_varset_set_range. 2023-08-28 20:16:54 +00:00
Interferon
0c3c9982b9 Added changes that didn't commit in merge 427 2023-08-28 22:14:46 +02:00
Michaël Van Canneyt
4822daaa4f * Patch from Alexey Torgashin to switch to const param strings where possible 2023-08-28 10:24:26 +02:00
Michaël Van Canneyt
2d1e14f778 * Fix max key size 2023-08-28 08:16:22 +02:00
florian
15e7dd3d9f * patch and test by Rika: Redirect StrUtils.RPos to StrUtils.RPosEx, fix a bit, improve a bit, resolves #40394 2023-08-27 22:33:00 +02:00
Marcus Sackrow
9c6d1d7dca AROS: fixed dotted rtl 2023-08-27 22:31:35 +02:00
Marcus Sackrow
374d22b5ea MorphOS: fixed support for dotted rtl 2023-08-27 20:44:34 +02:00
Michaël Van Canneyt
db1a906a8f * correct grammar in comment 2023-08-27 16:23:24 +02:00
Michaël Van Canneyt
81a1447b54 * Support for content-disposition: attachment 2023-08-27 16:09:43 +02:00
Michaël Van Canneyt
1886fad528 * Blowfish II implementation 2023-08-27 15:39:19 +02:00
Marcus Sackrow
1714dbb563 Amiga: Enable Dotted RTL for Amiga 2023-08-27 12:13:43 +02:00
florian
e19103e9a9 * missing file to build added, as mentioned by Mathew Bradford
* Makefile regenerated
2023-08-27 10:48:41 +02:00
florian
fb391d571a * another test renamed 2023-08-27 10:48:15 +02:00
florian
e1f7b50985 * renamed tests so they are actually run 2023-08-27 10:09:40 +02:00
florian
dd586da709 * formatting 2023-08-26 22:14:36 +02:00
Interferon
c482bafdaf There is code in the register allocator to restrict register allocation to the
first 16 registers in RISC-V RVE and RVEC modes.  However, there was still
code in tcpuparamanager.create_paraloc_info_intern that allowed the allocation
of up to register X17 in RVE and RVEC modes.  Modified this function to
take the processor mode into account and restrict it to X0..X15 in RVE and RVEC modes.

Also put conditional code in setjump.inc assembler code to only set the first
16 registers in RVE and RVEC modes.

The entire embedded-riscv32 RTL can now compile successfuly in RVEC mode.
2023-08-26 22:12:00 +02:00
Interferon
8382c6f586 Added generic WCH32Vx RISC-V processor types using memory size suffixes
Modified low-level startup code for RISCV32 embedded microcontrollers to
allow user code override of reset handlers for non-power-up reset events
as well as enabling user code override handlers for all 255 possible
interrupt vectors.
Separated out the low-level startup memory init into a callable procedure
to allow users that have caught reset events to init memory again if needed.

Signed-off-by: Interferon <brspm2@pinnaclesimulation.com>
2023-08-26 22:12:00 +02:00
ccrause
5930ffa135 Call rtl_do_close handler in sysfile.do_close, as reported by Kostas Michalopoulos 2023-08-26 09:24:46 +02:00
J. Gareth "Curious Kit" Moreton
1bcf4a5a8c * New test to detect SSE/AVX optimisation error 2023-08-24 19:41:41 +00:00
J. Gareth "Curious Kit" Moreton
35e52b90f5 * Added missing register allocations to SSE/AVX optimisations 2023-08-24 19:41:41 +00:00
J. Gareth "Curious Kit" Moreton
49d66b8f20 * x86: Fixed bug where incorrect SSE/AVX peephole optimisations were performed under -O3 in some situations. 2023-08-24 19:41:41 +00:00
Michaël Van Canneyt
a748d7279c * Re-add comment 2023-08-24 14:58:22 +02:00
Michaël Van Canneyt
6a07a508b8 * Simplify GetEnumNameCount (by Lagprogramming). Fixes issue #40411 2023-08-24 08:44:01 +02:00
marcoonthegit
1a4428536f Follow up commit to #40402
* prefix 0x when writing hex values.
 * write 8, not 4 digits.
2023-08-22 23:10:37 +02:00
Jonas Maebe
a9f3906dd5 default(): fix in generics for non-procvars after 1be7416816
Block added in the wrong place :|

Resolves #40409
2023-08-22 21:19:12 +02:00
Michaël Van Canneyt
c09e8778bd * Small improvement in inittls. Fixes issue 40408 2023-08-21 23:19:15 +02:00
Ondrej Pokorny
a518fb1fd5 set FSocketInitialized to False in TSocketStream.Close (fix AV when Close is called twice) 2023-08-21 21:11:29 +00:00
Ondrej Pokorny
38537fe27f SSL sockets: propagate socket error on SSL_ERROR_SYSCALL (SSL_ERROR_SYSCALL means an error happened on the underlying socket) 2023-08-21 21:11:29 +00:00
Ondrej Pokorny
75338da133 Sockets errors redefined as regular Berkeley error constants also for Linux + add EINTR for Win 2023-08-21 21:11:29 +00:00
Jonas Maebe
2476062198 default(): fix webtbf/tw37303 after previous changes 2023-08-21 22:40:24 +02:00
Jonas Maebe
1be7416816 default value: fix issue with inlining
Ensure the mangled name is always the same

Resolves #40404
2023-08-20 22:08:47 +02:00
marcoonthegit
6ab91262b2 * make an excpetion and allow undocumented TD_QUESTION_ICON constant. There are multiple sources for this. Fixes #40406 2023-08-19 11:06:46 +02:00
marcoonthegit
fb0d1c353c * foreground,background color sitemap reading for TOC, fixes #40402 2023-08-19 11:04:56 +02:00
mattias
203c566875 fcl-process: fixed parsing CommandLine under unix 2023-08-19 10:33:09 +02:00
Henrique Gottardi Werlang
1ca9f9af51 Rebase error. 2023-08-16 14:31:42 -03:00
Rika Ichinose
1a6e6a1b0b Improve generic large set operations: +, -, *, ><, =, <=, mostly by working in PtrUints. 2023-08-16 17:15:33 +00:00
mattias
9f93b88c1c pastojs: fixed pass ClassInstVar to IntfType 2023-08-16 18:33:09 +02:00
mattias
0778071be7 pastojs: fixed possible mem leak 2023-08-16 18:08:46 +02:00
Henrique Gottardi Werlang
14fa611979 Fixed creation pointer information in Pas2Js. 2023-08-16 06:25:58 +00:00
ccrause
9440b17eea [AVR] Add command line options to selectively remove portions of the RTL startup code. 2023-08-15 21:33:58 +00:00
florian
c48c816e49 * (modified) patch by Jinyang He to handle alignment in FindInFieldTable correctly, resolves #40400 2023-08-15 23:31:33 +02:00
Jonas Maebe
50040a2cab default values: store as staticvarsyms in staticsymtable
Previously, they were stored as localvarsyms in either the localsymtable
(for procedures/functions) or as localvarsyms in the staticsymtable (for
init/fini code of units/main programs). The latter was a hack (staticsymtables
normally cannot contain localvarsyms) and caused the temp allocator to also
allocate them as a local in fini code even if the default was only in the init
code.

The new approach ensures at most one copy gets allocated per unit, it doesn't
require explicit initialisation (since staticvarsyms are in bss -> zeroed by
default), gets rid of the localvarsyms in staticsymtables, and as a bonus
solves an issue with inconsistent LLVM debug information for the localvarsym
in init/fini code (since the staticsymtable is shared between the init and
fini code, so was the local, and therefore we generated debug info stating
it was defined in the fini code but within the scope of the init code).

Resolves #40395
2023-08-15 21:13:48 +02:00
florian
cc27a5de78 + test from Rika for merge request 458 2023-08-14 23:21:25 +02:00
J. Gareth "Curious Kit" Moreton
dde19c0144 * Improvement to TEST/JNE/TEST/JNE code to be more accurate where register deallocations are concerned 2023-08-12 23:43:05 +00:00
J. Gareth "Curious Kit" Moreton
699db16fe4 * x86: Fixed bug in TEST/JNE/TEST/JNE optimisation that caused bad code to be generated under -O3 2023-08-12 23:43:05 +00:00