Jonas Maebe
7395058cf3
* recognise tb(n)z as branch opcode (patch by Edmund Grimley Evans)
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git-svn-id: trunk@30846 -
2015-05-14 14:42:03 +00:00
Jonas Maebe
bc5a33ffac
* fixed flags_to_cond() and inverse_cond() for C_GE
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git-svn-id: trunk@29954 -
2015-02-23 22:55:11 +00:00
Jonas Maebe
30b0f830c3
* fixed std_param_align
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o also updated copyright and architecture name
git-svn-id: trunk@29919 -
2015-02-23 22:52:55 +00:00
Jonas Maebe
96fcf6a12d
* added BL and CB(N)Z to is_calljmp()
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git-svn-id: trunk@29912 -
2015-02-23 22:52:33 +00:00
Jonas Maebe
aa0e2e9170
* fixed cgsize2subreg and cgsize2subreg for mm subreg sizes
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git-svn-id: trunk@29911 -
2015-02-23 22:52:30 +00:00
Jonas Maebe
c2b1ff41d5
- removed ARM leftover tspecialregflag type
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git-svn-id: trunk@29910 -
2015-02-23 22:52:27 +00:00
Jonas Maebe
4c504098ca
+ C_CS/C_CC condition and F_HS/F_LO flag aliases
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git-svn-id: trunk@29909 -
2015-02-23 22:52:23 +00:00
Jonas Maebe
6e55e8356e
+ IP0/IP1 register aliases
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git-svn-id: trunk@29908 -
2015-02-23 22:52:20 +00:00
Jonas Maebe
de2dd592ab
+ shiftedregmodes and extendedregmodes set constants
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git-svn-id: trunk@29892 -
2015-02-23 22:51:28 +00:00
Jonas Maebe
17bcd207af
* fixed lowercase entry in uppercond2str
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git-svn-id: trunk@29891 -
2015-02-23 22:51:25 +00:00
Jonas Maebe
01a6777530
* simplified flag_2_cond array range
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git-svn-id: trunk@29852 -
2015-02-23 22:49:25 +00:00
Jonas Maebe
51a094a917
+ FP/LR register aliases
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git-svn-id: trunk@29851 -
2015-02-23 22:49:22 +00:00
Jonas Maebe
e6d7c6a62a
+ is_shifter_const() function to determine whether a constant can be encoded
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as an immediate operand for a logical operation
git-svn-id: trunk@29850 -
2015-02-23 22:49:19 +00:00
Jonas Maebe
d23299af1e
* fixed cgsize2subreg() for integer registers (we can use 32 and 64 bit
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registers -> 64 bit values go into 64 bit registers and everything else into
32 bit ones)
git-svn-id: trunk@29849 -
2015-02-23 22:49:15 +00:00
Jonas Maebe
f5950ac4cd
+ added remaining aarch64 shift/extension modes
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git-svn-id: trunk@29842 -
2015-02-23 22:48:55 +00:00
Jonas Maebe
24d3b1cdf6
+ tcgsizep2size[] to convert a tcgsize to its power-of-2 bytesize
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git-svn-id: trunk@29841 -
2015-02-23 22:48:52 +00:00
Jonas Maebe
a49d386541
+ SW postfix for sign extending a 32 bit integer
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git-svn-id: trunk@29840 -
2015-02-23 22:48:49 +00:00
Jonas Maebe
ff61aba3fe
* there is no ROR shiftmode on AArch64
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git-svn-id: trunk@29839 -
2015-02-23 22:48:46 +00:00
Jonas Maebe
3cfa91a249
* enable cgsize2subreg() and cgsize2subreg() to differentiate between 32 and
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64 bit integer registers
git-svn-id: trunk@29836 -
2015-02-23 22:48:37 +00:00
Jonas Maebe
df8b644190
- removed some ARM leftovers
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git-svn-id: trunk@29835 -
2015-02-23 22:48:33 +00:00
Jonas Maebe
76d779b648
* added SW suffix
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git-svn-id: trunk@29833 -
2015-02-23 22:48:27 +00:00
Jonas Maebe
f1b619a942
* made (X|W)ZR and (W)SP separate registers, because a number of
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instructions can use either depending on the encoding
git-svn-id: trunk@29831 -
2015-02-23 22:48:21 +00:00
Jonas Maebe
e8c9b94147
* X29 is callee-saved
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git-svn-id: trunk@29830 -
2015-02-23 22:48:18 +00:00
svenbarth
c48d572996
Implement support for saving and restoring address registers.
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cgobj.pas, tcg:
* g_save_registers: add the amount of used address registers to size as well
* g_save_registers: save all used address registers
* g_restore_registers: restore all stored address registers
m68k/cpubase.pas:
* rename saved_standard_address_registers to saved_address_registers
all other platform's cpubase.{inc,pas} (except alpha, ia64 and vis which are not up to date):
* add a saved_address_registers variable with one entry of RS_INVALID
At least a "make fullcycle" did complete.
git-svn-id: trunk@25664 -
2013-10-05 21:43:42 +00:00
florian
9e35bfa252
* adapt condition
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+ several missing constants added
git-svn-id: trunk@22912 -
2012-11-01 20:11:49 +00:00
florian
ca75588989
+ first cpubase implementation for aarch64
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git-svn-id: trunk@22901 -
2012-11-01 17:18:25 +00:00
