names, and disabled them for ppc64 ELFv2
* disabling those also disables the function descriptors, so use the
_CALL_ELF compiler variable to check whether there is in fact a
function descriptor
git-svn-id: trunk@30196 -
to free up space for more ait_* types in taitype (can't have
more than 32 because they have to fit in a small set)
o factored out writing of floating point numbers as an array of
byte in the external assemblers
git-svn-id: branches/hlcgllvm@28105 -
the value set by -Ch or the second parameter to the $M directive). This is
equivalent to the heapmin value in Turbo Pascal 7 and ensures that the program
has at least this amount of heap space available (otherwise DOS will show a
'not enough memory' error and will refuse to load the program).
git-svn-id: trunk@28002 -
itself (instead of having a fixed 16k stack in the startup code). This allows
setting the stack size in these models with the -Cs option.
git-svn-id: trunk@27820 -
otherwise data in initialised packed records gets aligned wrongly. This
should probably also be done for other targets that automatically
align .short/.long/...
git-svn-id: trunk@27600 -
Add support for .set and .weak on AVR.
Fix 64 bit negation on AVR.
Add cpu_capabilities to cpuinfo.pas and fixed some peephole optimizations.
Pass >4 byte parameters by reference.
git-svn-id: trunk@26943 -
* Change MIPS jump tables in PIC mode to use gp-relative constants, making them ABI-compliant and not requiring dynamic relocations.
git-svn-id: trunk@26886 -
* aggas.pas, TGNUAssembler.WriteTree.doalign:
instead of strangely checking for the previous instruction always use .balignw if the previous code was code and we should not use a specific instruction
git-svn-id: trunk@26839 -
Therefor the cpu type (-Cp...) "coldfire" was split up into "isaa", "isaa+", "isab" and "isac". The Linux RTL can currently compiled for "68020", "isab" and "isac". For the other three Bcc.L must be handled differently (only Bcc.B/W supported) and for "68000" also EXT.L needs to be handled differently.
fpcdefs.inc:
+ define CPUCAPABILITIES if capabilities can be set for a certain CPU type (currently ARM, AVR and M68k)
options.pas:
* check for CPUCAPABILITIES instead of specific CPUs
assemble.pas:
- the handling of the CPU type is already done in m68k/ag68kgas.pas, Tm68kGNUAssembler.MakeCmdLine (and thereby already using the gascputypestr array!)
m68k/cpuinfo.pas:
- tcputype: remove "cpu_coldfire"
+ tcputype: add "cpu_isa_a", "cpu_isa_a_p", "cpu_isa_b" and "cpu_isa_c"
+ add "cpu_coldfire" constant which contains all Coldfire specific cpu types
* adjust "cputypestr" and "gascputypestr"
+ add tcpuflags and cpu_capabilities (DBRA restriction was checked with CPUCOLDFIRE, CAS/TAS will be needed for atomic operations and BRAL restriction was discovered during testing of new cpu types)
m68k/cgcpu.pas:
* adjust checks for "cpu_coldfire"
m68k/n68kadd.pas:
* don't use a BRA.L if it is not supported, but (at least for now) a BRA.W
aggas.pas:
* adjusted check for Coldfire
git-svn-id: trunk@25457 -
So we need to do this manually by changing (in that case) from ".balign" to ".balignw" and passing the opcode of the "NOP" instruction as a argument. The Coldfire manual suggests here to use the "TPF" instruction, but somehow QEMU does not interpret that correctly.
aggas.pas, tgnuassembler.writetree:
* keep track of the last "tai" and pass that to "doalign"
* doalign: do the special handling mentioned above for m68k
git-svn-id: trunk@22799 -
fixes a couple of arm-embedded stuff,
adds some controllers, start of fpv4_s16 support, for a complete list of
changes see below:
------------------------------------------------------------------------
r22787 | laksen | 2012-10-20 22:00:36 +0200 (Sa, 20 Okt 2012) | 1 line
Properly do NR_DEFAULTFLAGS detection/allocation/deallocation
------------------------------------------------------------------------
r22782 | laksen | 2012-10-20 07:44:55 +0200 (Sa, 20 Okt 2012) | 1 line
Fixed flags detections code for wide->short optimization code for Thumb-2
------------------------------------------------------------------------
r22778 | laksen | 2012-10-19 20:23:14 +0200 (Fr, 19 Okt 2012) | 1 line
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
------------------------------------------------------------------------
r22647 | laksen | 2012-10-14 21:28:08 +0200 (So, 14 Okt 2012) | 1 line
Added register specifications to lpc1768.pp. From Joan Duran
------------------------------------------------------------------------
r22646 | laksen | 2012-10-14 21:10:20 +0200 (So, 14 Okt 2012) | 4 lines
Fixed some minor formating issues
Implemented a small heap mananger
Implemented console IO
Changed default LineEnding to CrLf(to ease console IO parsing)
------------------------------------------------------------------------
r22599 | laksen | 2012-10-09 08:58:58 +0200 (Di, 09 Okt 2012) | 1 line
Added all STM32F1 configurations
------------------------------------------------------------------------
r22597 | laksen | 2012-10-08 22:10:45 +0200 (Mo, 08 Okt 2012) | 1 line
Added initial support for the Cortex-M4F FPv4_S16 FPU
------------------------------------------------------------------------
r22596 | laksen | 2012-10-08 22:04:14 +0200 (Mo, 08 Okt 2012) | 1 line
Added FPv4_d16 FPU instructions, and a few extra registers
------------------------------------------------------------------------
r22592 | laksen | 2012-10-08 16:07:40 +0200 (Mo, 08 Okt 2012) | 2 lines
Added support for IT block merging
Added a peephole pattern check for UXTB->UXTH chains
------------------------------------------------------------------------
r22590 | laksen | 2012-10-08 14:30:00 +0200 (Mo, 08 Okt 2012) | 3 lines
Add CBNZ/CBZ instructions
Create preliminary Thumb-2 PeepHoleOptPass2 code, hacked together from the ARM mode code
Added a number of simple size optimizations for common Thumb-2 instructions
------------------------------------------------------------------------
r22582 | laksen | 2012-10-08 06:49:39 +0200 (Mo, 08 Okt 2012) | 3 lines
Fix optimizations of Thumb-2 code
Fix problem with loading of condition operand for IT instructions
Properly split IT blocks when register allocator tries to spill inside a block.
------------------------------------------------------------------------
r22581 | laksen | 2012-10-08 05:15:40 +0200 (Mo, 08 Okt 2012) | 4 lines
Fixed assembler calling command line for cpus>ARMv5TE. EDSP instructions will generate errors while assembling, due to RTL assembler routines
Updated boot code for all Cortex-M3 controllers, and sc32442b to use weak linking for exception tables.
Cortex-M3 devices now also share initialization routine to simplify maintenance
STM32F10x classes now have specific units which fit the interrupt source names and counts
------------------------------------------------------------------------
r22580 | laksen | 2012-10-08 05:10:44 +0200 (Mo, 08 Okt 2012) | 2 lines
Added support for .section, .set, .weak, and .thumb_set directive for GAS assembler reader
IFDEF'ed JVM specific assembler directives, to prevent ait_* set to exceed 32 elements
------------------------------------------------------------------------
r22579 | laksen | 2012-10-08 02:10:52 +0200 (Mo, 08 Okt 2012) | 3 lines
Remove all traces of the interrupt vector table generation mechanism
Clean up cpuinfo tables
Fixed ARMv7M bug(BLX <label> doesn't exist on that version)
git-svn-id: trunk@22792 -
o the order of .lcomm operands was inverted and can't specify an alignment
o the section in which to place them can't be adorned using [RW] access
specifiers (it's always in .bss, which is [RW] by definition)
git-svn-id: trunk@22644 -
Make macro MIPS/CPUMIPS/MIPS32 common for big endian and little endian mips processors
use MIPSEL* for little endian systems
use MIPSEB* for big endian systems
git-svn-id: trunk@21599 -
that deal with paths/filenames with TPathStr (= ansistring) to prevent
cutting off long paths (no change in speed when compiling the compiler,
1% extra memory usage)
git-svn-id: trunk@21120 -
generate line number information) from longint into cardinal, since it
should never become < 0 (allows catching errors by enabling range
checking)
git-svn-id: trunk@21114 -
(= equivalent of gas .quad), because .llong forces the alignment to
8 bytes and this causes problems with some typed constant records (such
as RTTI)
git-svn-id: trunk@21045 -
to 0 or 1 (section alignment <> alignment of individual data
elements in section on some platforms, such as AIX)
* set constalignmin and varalignmin to 8 bytes for AIX/ppc64
git-svn-id: trunk@21044 -
on AIX. Adding ".align" statements only align relative to the section
start, but does not influence the alignment of the section itself
git-svn-id: trunk@20835 -
o .short/.long/.llong are automatically aligned to 2/4/8 byte multiples
by the AIX assembler (and for compatibility reasons, also by the
GNU assembler when targeting AIX) -> change to .vbyte statements
o .ascii does not allow non-ASCII characters in the AIX assembler
-> change to .byte sequences like gcc on AIX
git-svn-id: trunk@20803 -
of the AVR-specific ifdef'ed variant
o since the only special character we use in mangled names on all platforms
is $, added a new field to tasminfo called "dollarsign" that holds the
character $'s should be replaced with (if it doesn't have to be replaced,
leave it at $)
git-svn-id: trunk@20801 -
* For now placed actual processing of unwind info under {$ifdef TEST_WIN64_UNWIND}, because in the current state it doesn't add much value.
git-svn-id: trunk@19200 -
* tried to fix dbgstabs so that it doesn't emit illegal chars using ReplaceForbiddenChars, however, dbgstabs accesses symbol names quite often, so this failed
git-svn-id: trunk@18972 -
+ parsing of section directive for variables
+ section test
+ write section names in the assembler/binary writers correctly
* allow section only after ; and for embedded targets
git-svn-id: branches/usersections@17154 -
later: the same as i386/darwin, except
a) uses the non-fragile Objective-C ABI/runtime
b) does not require stubs for direct calls/jumps (not required for
i386/darwin under 10.6 and later either, but still generated
there for backwards compatibility)
c) only the same packages are enabled as for ARM/Darwin
d) MacOSAll is compiled specifically for the iPhoneSimulator SDK
This target also defines the symbol "darwin" apart from the target
name "iphonesim" for source code compatibility reasons.
git-svn-id: trunk@16065 -
- sort of reverted r14134, which is no longer required after the above
change (new_section() inserts the alignment itself)
* made the tai_section.create() constructor private so it cannot be
called directly anymore
git-svn-id: trunk@15482 -
properties/behaviour of the equivalent of Extended in C (i.e., to
"long double" on i386 and x86_64 platforms that support a 10 byte
long double, and to "double" elsewhere)
git-svn-id: trunk@14912 -
mark_NoLineinfoEnd
* add "no line info" markers for try/except and try/finally internal cleanup
code, so the debugger doesn't jump back and forth between the end and start
of exception blocks when you arrive at the end
* honour "no line info" markers in dbgdwarf.pas
git-svn-id: trunk@14327 -
-- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«:
U rtl/arm/setjump.inc
A rtl/arm/thumb2.inc
U rtl/arm/divide.inc
A rtl/embedded/arm/stm32f103.pp
U rtl/inc/system.inc
U compiler/alpha/cgcpu.pas
U compiler/sparc/cgcpu.pas
U compiler/i386/cgcpu.pas
U compiler/ncgld.pas
U compiler/powerpc/cgcpu.pas
U compiler/avr/cgcpu.pas
U compiler/aggas.pas
U compiler/powerpc64/cgcpu.pas
U compiler/x86_64/cgcpu.pas
U compiler/cgobj.pas
U compiler/psystem.pas
U compiler/aasmtai.pas
U compiler/m68k/cgcpu.pas
U compiler/ncgutil.pas
U compiler/rautils.pas
U compiler/arm/raarmgas.pas
U compiler/arm/armatts.inc
U compiler/arm/cgcpu.pas
U compiler/arm/armins.dat
U compiler/arm/rgcpu.pas
U compiler/arm/cpubase.pas
U compiler/arm/agarmgas.pas
U compiler/arm/cpuinfo.pas
U compiler/arm/armop.inc
U compiler/arm/narmadd.pas
U compiler/arm/aoptcpu.pas
U compiler/arm/armatt.inc
U compiler/arm/aasmcpu.pas
U compiler/systems/t_embed.pas
U compiler/psub.pas
U compiler/options.pas
git-svn-id: trunk@13801 -
* the objc unit links against the Foundation instead of against the Cocoa
framework, and inludes an interface to either the fragile or non-fragile
obj-c run time depending on the target platform
+ support for the non-fragile Objective-C runtime/ABI, as used on Mac OS X
for ARM (iPhone) 64 bit (PowerPC/64, x86_64) -- all these targets now
are now also supported for the objectivec1 modeswitch
+ support for private_extern symbol bindings, required for the above
* mark objcclasses that are declared in the implementation section of a
unit as "hidden" (not sure what the effect is, since the Objective-C
runtime does not seem to do anything with this flag)
* enabled all obj-c tests for the newly supported platforms
git-svn-id: branches/objc@13763 -
register required classes:
+ add lazy references to classes referred to in the current unit
+ define reference symbols for classes defined in the current unit
+ add lazy references to parent classes of classes defined in the current
unit
git-svn-id: branches/objc@13679 -
the use of Objective-C 1.0 constructs. Because it is a mode switch, it
can be used cumulatively with every syntax mode. Note that a {$mode xxx}
statement resets all mode switches as well, so you cannot use the
-Mobjectivec1 variant if you have such a statement in a unit. This
modeswitch is currently only enabled for Darwin/PowerPC and Darwin/i386,
as the backend support is not yet implemented for other platforms.
+ implemented selector() statement that can be used to create an Objective-C
selector for the message with the specified *constant* name (in the future,
it will also work for Objective-C method identifiers)
+ added SEL type to the system unit (the selector() statement returns it)
+ added all Objective-C segments to the assembler writers
+ (currently mostly dummy) objc1 unit that is automatically included if the
{$modeswitch objectivec1} statement is used
+ some tests for the selector() statement
git-svn-id: trunk@12870 -
the syntax is exactly the same as for "external", except for
the keyword. It is currently only active for Darwin targets.
It should also work at least for Linux targets, but only with
the GNU assembler (which is why it is not activated there)
+ test for this functionality
git-svn-id: trunk@12009 -
+ write the header for non-pic darwin/arm call stubs properly in aggas
* r9 is not available for general use on darwin/arm according to the llvm
code generator
git-svn-id: trunk@11862 -
