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150 Commits

Author SHA1 Message Date
Pierre Muller
fbe64536d1 Cast properly to avoid range error 2023-09-14 10:04:02 +02:00
Pierre Muller
e2905b8fad Refuse A_Jcc, A_SETcc, and A_CMOVcc without condition 2022-12-10 19:50:47 +00:00
florian
6218254e53 * allow also 8 byte string constants in assembler, resolves #28640 
git-svn-id: trunk@49066 -
 2021-03-27 17:13:14 +00:00
florian
482698e566 + add endsym to ConcatConstSymbol 
git-svn-id: trunk@47668 -
 2020-12-02 21:44:12 +00:00
florian
1d3ed354de * patch by J. Gareth Moreton: unifies internalerrors, resolves #37471 
git-svn-id: trunk@46234 -
 2020-08-04 20:51:52 +00:00
yury
1b3a3a7983 * Removed lot of unused local vars. It is useful to turn on the notes in options. :) 
git-svn-id: trunk@44053 -
 2020-01-28 18:45:33 +00:00
Jonas Maebe
1a9e246c29 * added is_normal_fieldvarsym() helper and use it 
o fixes several places where there was a check whether something is a
     fieldvarsym, but not whether it's an instance rather than a class field

git-svn-id: trunk@43786 -
 2019-12-24 22:12:44 +00:00
florian
5947143d8f * intel asm reader: try to read avx512 extensions only if the instruction supports them 
* cleanup

git-svn-id: trunk@42656 -
 2019-08-12 10:46:19 +00:00
florian
7f8dc75604 -- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«: 
U    compiler/i8086/r8086int.inc
U    compiler/i8086/r8086nor.inc
U    compiler/i8086/r8086rni.inc
U    compiler/i8086/r8086std.inc
U    compiler/i386/i386prop.inc
U    compiler/i386/i386att.inc
U    compiler/i386/i386atts.inc
U    compiler/i386/i386int.inc
U    compiler/i8086/i8086int.inc
U    compiler/i8086/i8086op.inc
U    compiler/i8086/r8086dwrf.inc
U    compiler/i8086/r8086ari.inc
U    compiler/i8086/r8086con.inc
U    compiler/i8086/r8086nasm.inc
U    compiler/i8086/r8086num.inc
U    compiler/i8086/r8086stab.inc
U    compiler/i386/i386nop.inc
U    compiler/i386/i386op.inc
U    compiler/i386/i386tab.inc
U    compiler/i386/r386ot.inc
U    compiler/i386/r386ari.inc
U    compiler/i386/r386att.inc
U    compiler/i386/r386con.inc
U    compiler/i386/r386dwrf.inc
U    compiler/i386/r386int.inc
U    compiler/i386/r386iri.inc
U    compiler/i386/r386nasm.inc
U    compiler/i386/r386nor.inc
U    compiler/i386/r386nri.inc
U    compiler/i386/r386num.inc
U    compiler/i386/r386rni.inc
U    compiler/i386/r386sri.inc
U    compiler/i386/r386stab.inc
U    compiler/i386/r386std.inc
U    compiler/i8086/i8086prop.inc
U    compiler/i8086/i8086att.inc
U    compiler/i8086/i8086atts.inc
U    compiler/i8086/i8086nop.inc
U    compiler/i8086/i8086tab.inc
U    compiler/i8086/r8086ot.inc
U    compiler/i8086/r8086att.inc
U    compiler/i8086/r8086iri.inc
U    compiler/i8086/r8086nri.inc
U    compiler/i8086/r8086sri.inc
U    compiler/x86/agx86int.pas
U    compiler/x86/rax86int.pas
U    compiler/x86/aasmcpu.pas
U    compiler/x86/rax86.pas
U    compiler/x86/x86ins.dat
U    compiler/x86/agx86att.pas
U    compiler/x86/cpubase.pas
 U   packages/rtl-objpas/src/inc/rtti.pp
 U   packages/rtl-objpas/tests/tests.rtti.pas
 U   rtl
U    compiler/x86_64/x8664att.inc
U    compiler/x86_64/x8664tab.inc
U    compiler/x86_64/r8664con.inc
U    compiler/x86_64/r8664nasm.inc
U    compiler/x86_64/r8664sri.inc
U    compiler/aasmtai.pas
U    compiler/scanner.pas
U    tests/utils/avx/readme.txt
U    compiler/x86_64/x8664ats.inc
U    compiler/x86_64/x8664op.inc
U    compiler/x86_64/r8664att.inc
U    compiler/x86_64/r8664iri.inc
U    compiler/x86_64/r8664rni.inc
U    compiler/pp.lpi
U    compiler/msgtxt.inc
U    compiler/ppcx64.lpi
U    compiler/x86_64/x8664pro.inc
U    compiler/x86_64/x8664nop.inc
U    compiler/x86_64/r8664ari.inc
U    compiler/x86_64/r8664int.inc
U    compiler/x86_64/r8664num.inc
U    compiler/x86_64/r8664std.inc
U    compiler/msgidx.inc
U    compiler/utils/mkx86ins.pp
U    compiler/x86/x86reg.dat
D    compiler/x86/cx86innr.inc
U    compiler/x86_64/x8664int.inc
U    compiler/x86_64/r8664ot.inc
U    compiler/x86_64/r8664dwrf.inc
U    compiler/x86_64/r8664nor.inc
U    compiler/x86_64/r8664stab.inc
U    compiler/msg/errore.msg
U    compiler/utils/mkx86reg.pp
U    tests/utils/avx/asmtestgenerator.pas
U    tests/utils/avx/options.pas
U    tests/utils/avx/avxtestgenerator.pp
U    tests/test/units/character/tissurrogatepair2.pp
U    tests/test/units/character/tissurrogatepair.pp
U    tests/utils/avx/avxopcodes.pas
 U   .
-- Aufzeichnung der Informationen für Zusammenführung zwischen Projektarchiv-URLs in ».«:
 U   .
 U   packages/rtl-objpas/src/inc/rtti.pp
 U   packages/rtl-objpas/tests/tests.rtti.pas
 U   rtl

git-svn-id: trunk@42654 -
 2019-08-11 17:29:30 +00:00
florian
746bfced25 Synchronized with trunk, part 1 (only make cycle tested, make all is broken, avx-512 support not yet tested 
git-svn-id: branches/tg74/avx512@42642 -
 2019-08-10 13:53:20 +00:00
nickysn
914426e703 * fixed an i8086 inline assembler bug, where 'call word ptr [label]' (an 
indirect call) was assembled as 'call near label' (direct call) instead of
  'call near [label]' and 'call dword ptr [label]' was assembled as
  'call near label' instead of 'call far [label]'

git-svn-id: trunk@42176 -
 2019-06-05 15:49:39 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would 
be introduced by the next commit

git-svn-id: trunk@42046 -
 2019-05-12 14:29:03 +00:00
pierre
8d5cfa8731 Disable range checking in rax86int unit 
git-svn-id: trunk@40237 -
 2018-11-06 07:41:15 +00:00
tg74
60a75a2277 delete testcode 
git-svn-id: branches/tg74/avx512@39936 -
 2018-10-15 10:46:41 +00:00
tg74
15cc00164a bugfix avx512 - process operand-extention e.g. {SAE} correctly 
git-svn-id: branches/tg74/avx512@39653 -
 2018-08-20 13:30:17 +00:00
tg74
2b1da37d66 new avx512 instructions and bugfixes avx512 
git-svn-id: branches/tg74/avx512@39636 -
 2018-08-19 10:18:32 +00:00
tg74
867d145e50 support vector operand bcst,{sae},{er} + k-register 
git-svn-id: branches/tg74/avx512@39457 -
 2018-07-16 17:06:57 +00:00
tg74
4dc5442fa5 support vector operand writemask,zeroflag 
git-svn-id: branches/tg74/avx512@39359 -
 2018-07-02 20:20:03 +00:00
tg74
31e4d4ef5e AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512 
git-svn-id: branches/tg74/avx512@39196 -
 2018-06-08 06:53:35 +00:00
nickysn
49b414ffee + support ugly constructs like 'DD BYTE PTR 5' in the x86 intel syntax inline 
assembler; these are TP7 and Delphi compatible

git-svn-id: trunk@39143 -
 2018-05-29 15:43:08 +00:00
nickysn
8a32d7c663 + also support constants like 'dd [5]' in the intel syntax inline asm (for BP7 
compatibility)

git-svn-id: trunk@38855 -
 2018-04-27 11:21:51 +00:00
nickysn
a8a627f334 - removed the _count_asmdirectives and _count_asmoperators constants from the 
rax86int unit. Instead, the _asmoperators and _asmdirectives arrays now use
  tasmtoken directly as index.

git-svn-id: trunk@38854 -
 2018-04-27 11:02:54 +00:00
nickysn
16e0172021 + partial support for BP7 reference-like inline asm constants 
git-svn-id: trunk@38850 -
 2018-04-26 14:31:13 +00:00
nickysn
74f5436563 * also replaced the 3 boolean output parameters of tx86intreader.BuildConstSymbolExpression with a set 
git-svn-id: trunk@38833 -
 2018-04-24 15:40:37 +00:00
nickysn
e05c0d0168 * replaced the 3 boolean input parameters of tx86intreader.BuildConstSymbolExpression with a set 
git-svn-id: trunk@38832 -
 2018-04-24 14:59:39 +00:00
nickysn
602dd31a45 + added a warning for using cs/ds/es/ss segment overrides in inline assembly on 
the x86_64 target

git-svn-id: trunk@38517 -
 2018-03-13 14:41:21 +00:00
nickysn
daf13d8750 * print a "Cannot use local variable or parameters here" error (instead of 
internal error) in case of expressions that add two local variables using the
  [expr1[expr2]] syntax

git-svn-id: trunk@38514 -
 2018-03-13 12:25:54 +00:00
nickysn
77c782c89b * when adding OPR_LOCAL with OPR_REFERENCE in tx86intreader.AddReferences, add 
the offsets correctly:
    1) localconstoffset is added with constoffset
    2) localsymofs is added with ref.offset

git-svn-id: trunk@38470 -
 2018-03-09 14:17:19 +00:00
nickysn
68be282507 + support adding an OPR_REFERENCE to a OPR_LOCAL in the x86 intel syntax asm 
reader; this fixes stuff like 'mov ax,cs:localvar[5]'

git-svn-id: trunk@38457 -
 2018-03-08 14:32:31 +00:00
nickysn
6e79c8ba86 + support adding an OPR_LOCAL to a OPR_REFERENCE in 
tx86intreader.AddReferences(); this allows things like mov ax,[cs:[local]] to
  work

git-svn-id: trunk@38444 -
 2018-03-07 17:31:25 +00:00
nickysn
d3cb61b651 * refactored tx86intreader.AddReferences to use a pair of case statements, 
depending on the combination of operand types; this is done, so that adding
  OPR_LOCAL with OPR_REFERENCE operands can be supported later.

git-svn-id: trunk@38443 -
 2018-03-07 16:43:39 +00:00
nickysn
df6a870873 * print an "invalid segment override expression" error message in case a segment 
override uses an invalid (non-segment) register in the x86 inline asm reader
  (both for intel and att syntax)

git-svn-id: trunk@38391 -
 2018-03-01 15:34:16 +00:00
nickysn
c93c15429d + introduce tx86intreader.SetSegmentOverride(); using it everywhere adds more 
checks for duplicated segment overrides (which cause a warning in TP mode and
  an error in all the other compiler modes)

git-svn-id: trunk@38384 -
 2018-02-28 17:16:50 +00:00
nickysn
6f8abde786 + support [const+[ref]] in the x86 intel syntax asm reader 
git-svn-id: trunk@38383 -
 2018-02-28 16:24:45 +00:00
nickysn
8ffde52974 + also support [expr1]+[expr2] for adding references in the x86 intel syntax asm reader 
git-svn-id: trunk@38381 -
 2018-02-28 15:48:48 +00:00
nickysn
9c814e42c9 + support segment overrides inside references (e.g. [es:bx]) in the x86 intel 
syntax inline asm reader

git-svn-id: trunk@38365 -
 2018-02-27 17:29:46 +00:00
nickysn
1cf1ab8ab9 * consume the register in the reference before the check for invalid reference 
syntax in the x86 intel syntax asm reader; this is preparation for support of
  segment overrides inside the reference expression (i.e. [es:bx] instead of
  es:[bx])

git-svn-id: trunk@38363 -
 2018-02-27 16:35:55 +00:00
nickysn
f623038da6 + fixed a bug in the previous commit, when adding two references, the first 
containing a base register, the second - an index register with a scalefactor.
  The scalefactor was ignored in this case.

git-svn-id: trunk@38354 -
 2018-02-26 17:30:08 +00:00
nickysn
45fdd7655d + support concatenation of references in x86 intel syntax inline asm: 
[expr1][expr2] = [expr1+expr2]
  [expr1[expr2]] = [expr1+expr2]
  This is compatible with TP7's inline asm, and perhaps also with tasm/masm/delphi.

git-svn-id: trunk@38352 -
 2018-02-26 17:17:47 +00:00
florian
3b779278e2 + (slightly) patch by Emelyanov Roman to add support of SEH directive in FPC internal assembler with INTEL syntax, resolves #29894 
git-svn-id: trunk@38331 -
 2018-02-24 16:14:08 +00:00
nickysn
506d5fe30e + support bracketless references in the x86 intel syntax; ugly, but TP7 (and 
perhaps also Delphi, TASM and MASM)-compatible

git-svn-id: trunk@38296 -
 2018-02-20 17:18:09 +00:00
nickysn
ae6a4030c3 + support evaluation of recordtype*constant in the intel syntax inline asm. 
The recordtype itself is evaluated to 0. This makes e.g.
  'test [di+recordtype*5], 1' work. This is TP7 compatible.

git-svn-id: trunk@38200 -
 2018-02-11 03:42:45 +00:00
nickysn
f0765421eb + also set the operand size in constants like recordtype (without addressing a 
record field). This makes e.g.
    test [di + recordtype], 1
  work and use the size of recordtype to determine the operand size; recordtype
  itself is evaluated to 0, so if recordtype's size is 2 bytes, the above
  instruction assembles as:
    test word ptr [di], 1
  Ugly, but TP7 compatible.

git-svn-id: trunk@38176 -
 2018-02-09 17:43:31 +00:00
nickysn
7338437dcd * allow recordtype.recordfield constants to set the operand size; this makes things like 
test [di + recordtype.recordfield], 1
  work, as long as the size of recordfield is a valid operand size for the target

git-svn-id: trunk@38175 -
 2018-02-09 17:36:54 +00:00
nickysn
f829f70186 * use the 'size' return value of BuildConstSymbolExpression to set the operand size 
git-svn-id: trunk@38174 -
 2018-02-09 17:22:39 +00:00
nickysn
384715be8d + add an extra output parameter 'size' to tx86intreader.BuildConstSymbolExpression, 
which allows const symbol expressions to also have a size sometimes. Why?
  Because TP7 (and perhaps Delphi) allows not specifying the size in e.g.
    test [di+recordtype.recordfield], 1
  in this case, the operand size (byte ptr, word ptr, dword ptr, qword ptr) is
  determined by the size of recordtype.recordfield; this already happens with
  variables, but in this case, this is a type.field, which is resolved to a
  constant.
  This commit only adds a dummy 'size' parameter, which is always initialized to
  0 and not used. The actual implementation of the above will follow in separate
  commits.

git-svn-id: trunk@38173 -
 2018-02-09 16:52:12 +00:00
nickysn
4b339fd133 * convert the 'var' parameters of tx86intreader.BuildConstSymbolExpression to 'out' 
git-svn-id: trunk@38172 -
 2018-02-09 16:20:34 +00:00
nickysn
84611d716b * convert the 'var' parameters of tx86intreader.BuildRecordOffsetSize to 'out' 
git-svn-id: trunk@38171 -
 2018-02-09 16:15:40 +00:00
nickysn
391f85f828 + for TP7 compatibility, allow the '&', '$' and '?' characters in the x86 intel 
syntax inline asm reader

git-svn-id: trunk@38167 -
 2018-02-08 16:54:33 +00:00
nickysn
5f56f6ec11 * always pass a valid constsize to ConcatConstSymbol; this prevents a compiler 
internal error on i8086, generated by 'DB xx' or 'DB OFFSET xx'

git-svn-id: trunk@38153 -
 2018-02-07 16:17:05 +00:00