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c07da2a654
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219 Commits

Author SHA1 Message Date
florian
c07da2a654 * typo 2025-03-29 18:52:16 +01:00
florian
f8f54dcbcf + RiscV has internal rol/r support 2025-03-27 22:33:30 +01:00
Michaël Van Canneyt
5d100fd2c6 cpuNbitalu is not the correct type for fpc_atomic_cmp_xchg_alu on webassembly 2025-01-08 12:06:52 +01:00
Sven/Sarah Barth
d595976f4c + add missing cpu64bit defines for consistency 2025-01-07 20:39:16 +01:00
Michaël Van Canneyt
3f0593b554 * Better fix for atomic operations on wasm 2025-01-07 14:42:21 +01:00
Nikolay Nikolov
44c8193cfa + define cpufpemu for MIPS in order to enable (optionally) FPU emulation 2024-09-29 20:25:32 +03:00
Michaël Van Canneyt
1e9e533e6c * Replace object with record where possible 2024-05-04 16:44:32 +02:00
Pierre Muller
f6a0da71fc Do not set USEINLINE macro if DISABLE_INLINE macro is set 2024-05-02 09:36:27 +00:00
Jinyang He
12c4290ffe Add loongarch64 architecture support to compiler 2023-02-05 19:18:48 +00:00
florian
19ad26afd8 * Riscv32 and Riscv64 on linux: enable safecall support 2022-07-22 22:56:21 +02:00
Nikolay Nikolov
b6aaa06f83 + enable the ROL/ROR instructions for WebAssembly 2022-05-27 22:46:32 +03:00
Pierre Muller
00a287e77d Fix compilation of mips64 compiler by simple use of 'make mips64' 2022-02-14 23:24:36 +00:00
florian
28964711d7 * sorted defines in the compiler: mips64 is defined on all 64 Bit mips platforms, mips64el for little endian, misp64eb for big endian 2022-02-06 21:57:01 +01:00
florian
e9e8013316 + some basic stuff for MIPS64 2022-02-05 23:25:31 +01:00
florian
ed2b73eee6 * sorted MIPS defines 2022-02-04 23:07:25 +01:00
Pierre Muller
65880e6631 Also set mipseb or mipsel macro for 64-bit mips CPU 2022-02-04 19:57:42 +00:00
Pierre Muller
ea812d1c2e mips64 define must also set mips 2022-02-04 18:31:53 +00:00
Pierre Muller
91f29419a5 Avoid use of fastmath optimization inside compiler 2022-01-25 21:50:03 +00:00
florian
6404478ea4 * cleanup of VER3_0 defines 2021-11-17 22:19:57 +01:00
florian
814b68fac0 * more fixes for VASM for ARM 
git-svn-id: trunk@49398 -
 2021-05-23 19:46:40 +00:00
florian
f38f9ff930 * Aarch64: cpu capabilites defines properly named 
* Aarch64: enable defining cpu capabilites

git-svn-id: trunk@49108 -
 2021-04-02 20:57:12 +00:00
nickysn
8b4aceea50 * synchronized with trunk 
git-svn-id: branches/wasm@48134 -
 2021-01-11 07:01:01 +00:00
pierre
a78332ae7f Add setting of all optimization debug macros with single DEBUG_ALL_OPT macro 
git-svn-id: trunk@48111 -
 2021-01-08 11:05:29 +00:00
nickysn
aeafe42144 * synchronized with trunk 
git-svn-id: branches/wasm@47653 -
 2020-12-01 03:27:01 +00:00
pierre
787899b921 Allow easier disabling of $inline on, by using -dDISABLE_INLINE 
git-svn-id: trunk@47593 -
 2020-11-25 22:40:04 +00:00
nickysn
509821260e * synchronized with trunk 
git-svn-id: branches/wasm@47448 -
 2020-11-19 01:12:38 +00:00
pierre
10273e54dd Remove setting of USE_FAKE_SYSUTILS macro for MacOSClassic, as sysutils is now compiled for that OS 
git-svn-id: trunk@47382 -
 2020-11-10 22:36:31 +00:00
nickysn
d3d51d2f7e * synchronized with trunk 
git-svn-id: branches/wasm@47338 -
 2020-11-07 22:40:43 +00:00
florian
dbb0b24de8 * reverted accidental change 
git-svn-id: trunk@47268 -
 2020-11-01 14:27:59 +00:00
nickysn
842f400f0d * synchronized with trunk 
git-svn-id: branches/wasm@46860 -
 2020-09-12 22:49:06 +00:00
florian
d7fe9914a7 + introduce tcgobj.a_loadfpu_reg_intreg 
+ make use of it in tcgtypeconvnode.second_nothing
  + Xtensa: implementation of a_tcgcpu.a_loadfpu_intreg_reg and tcgcpu.a_loadfpu_reg_intreg

git-svn-id: trunk@46858 -
 2020-09-12 21:23:57 +00:00
nickysn
988a833836 * synchronized with trunk 
git-svn-id: branches/wasm@46665 -
 2020-08-23 15:31:53 +00:00
florian
92d5e613b5 * Xtensa: needs no mul helper, all variants have the MULL instruction 
git-svn-id: trunk@46539 -
 2020-08-21 21:35:50 +00:00
nickysn
39c5f11ec6 * the WASM define renamed WASM32 
git-svn-id: branches/wasm@46250 -
 2020-08-05 14:17:27 +00:00
nickysn
62cb7c2d12 * synchronized with trunk 
git-svn-id: branches/wasm@46214 -
 2020-08-03 21:15:39 +00:00
nickysn
95bed362ba [PATCH 02/83] updating common FPC sources for WASM target 
From 7705a37c1f11687c3d465c4645357d6679150996 Mon Sep 17 00:00:00 2001
From: Dmitry Boyarintsev <skalogryz.lists@gmail.com>
Date: Wed, 28 Aug 2019 17:01:14 -0400

git-svn-id: branches/wasm@45879 -
 2020-07-29 16:01:48 +00:00
florian
9710b2cbb4 + some basic stuff for mips64el 
git-svn-id: trunk@45614 -
 2020-06-07 20:04:17 +00:00
nickysn
3f62fb7fe7 + enabled FPU emulation for the Z80 
git-svn-id: branches/z80@45007 -
 2020-04-22 22:18:33 +00:00
nickysn
d2c32efb7b * synchronized with trunk 
git-svn-id: branches/z80@44809 -
 2020-04-18 23:47:30 +00:00
Jonas Maebe
ea2e516b4e + -ib parameter to print the code generator backend type: FPC or LLVM 
* some cleanups related to -i printing

git-svn-id: trunk@44787 -
 2020-04-18 15:44:42 +00:00
nickysn
6a2dbad8ca * synchronize with trunk 
git-svn-id: branches/z80@44555 -
 2020-04-04 00:36:08 +00:00
florian
ba3de67f3b + Xtensa: the boolean extension is used as flags 
git-svn-id: trunk@44538 -
 2020-04-03 20:15:22 +00:00
nickysn
755fe97c51 * synchronize with trunk 
git-svn-id: branches/z80@44397 -
 2020-03-29 16:24:32 +00:00
florian
73c68236b6 * Xtensa: completed compiler skeleton 
git-svn-id: trunk@44323 -
 2020-03-21 12:49:45 +00:00
florian
9e40d536cb + Xtensa: initial skeleton completed 
+ xtensa-embedded support in the compiler

git-svn-id: trunk@44318 -
 2020-03-20 22:34:33 +00:00
florian
6b47d9d9ed * safecall support is meanwhile generic, so enabled for all linux targets 
git-svn-id: trunk@44076 -
 2020-01-31 21:58:49 +00:00
Jonas Maebe
ac1e0f96bd * replaced tentryfile.get/putsmall/normalset() with a common tget/putset 
that expects an open array of byte, and use it for all sets
   o since all sets need to be typecasted to an array type of the appropriate
     size, we'll get a compilation error in case this needs to be done and
     that also tells us at the same time that the ppu version will need to
     be increased
  * enabled {$packset 1} for the compiler, as this is now safe with the above
    changes

git-svn-id: trunk@43407 -
 2019-11-06 21:50:19 +00:00
svenbarth
3ae1b04d09 * disable the use of C-operators inside the compiler's sources 
git-svn-id: trunk@43120 -
 2019-10-05 09:42:52 +00:00
Károly Balogh
4936358bee m68k: fpu capabilities support 
git-svn-id: trunk@42739 -
 2019-08-19 15:07:22 +00:00
florian
ba203c0564 + x86 makes use of fpu_capabilities 
* moved CPUX86_HAS_AVXUNIT to FPUX86_HAS_AVXUNIT
+ mm register allocator can be initialized with 32 mm registers of AVX512

git-svn-id: trunk@42707 -
 2019-08-16 11:35:03 +00:00