Commit Graph

48 Commits

Author SHA1 Message Date
florian
1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
git-svn-id: trunk@23682 -
2013-03-03 12:20:10 +00:00
florian
47d43750e4 * remove unused units from uses statements
git-svn-id: trunk@23306 -
2013-01-03 23:07:09 +00:00
Jeppe Johansen
a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU
git-svn-id: branches/laksen/arm-embedded@22597 -
2012-10-08 20:10:45 +00:00
florian
45383fd32d + a lot missing flag allocs/deallocs added
git-svn-id: trunk@22201 -
2012-08-23 08:54:52 +00:00
florian
d8161c185c + track usage of flags by using a new register RS_/NR_DEFAULTFLAGS
git-svn-id: trunk@22179 -
2012-08-22 19:37:51 +00:00
Jonas Maebe
edd42aa42a * moved subsetref/reg and bit_set/test support from cgobj to hlcgobj for
future use by high level code generator targets
   o this in turn required that all a_load*_loc* methods are called via
     hlcg rather than via cg, since a location can be a subsetref/reg and
     and those are no longer handled in tcg
   o that then required moving several force_location_* routines into
     thlcg because they use a_load_loc*, but did not take tdef size
     parameters (which are required by the thlcg a_load_loc* routines)
   o the only practical consequence is that from now on, you have to
     use hlcg.location_force_mem/reg() (fpureg not yet) and
     hlcg.gen_load_loc_cgpara() instead of the removed versions from ncgutil,
     and hlcg.a_load*loc*() instead of cg.a_load*loc* if a subsetref/reg
     might be involved

git-svn-id: trunk@21287 -
2012-05-13 12:33:10 +00:00
Jonas Maebe
6ba8dc7146 + support for the ARM hard float EABI on Linux (patch by Peter Green):
o new eabihf (hard float) abi
   o vfpv3_d16 variant of VFP (default variant used by EABI assemblers: VFPv3
     with only 16 double registers instead of 32) and pass it to GNU as
   o make the odd numbered single precision floating point VFP registers
     available for explicit allocation for use by the calling convention
  * fixed copy/paste error in stdname of S30 register
  -> use -dFPC_ARMHF to create an ARM eabi hard float compiler
  (mantis #21554)

git-svn-id: trunk@20660 -
2012-03-29 20:50:09 +00:00
florian
862f9dacea * handle int_to_bool for qwordbools correctly on arm
git-svn-id: trunk@19933 -
2011-12-31 14:14:21 +00:00
sergei
7d99f95c45 * Always create a section before emitting data to current_asmdata.asmlists[al_typedconsts]. Without it, such data ends up in sections created elsewhere, creating very non-obvious dependencies on other parts of compiler.
git-svn-id: trunk@17816 -
2011-06-24 02:05:56 +00:00
Jonas Maebe
d1538ab023 o added ARM VPFv2/VFPv3 support:
+ RTL support:
      o VFP exceptions are disabled by default on Darwin,
        because they cause kernel panics on iPhoneOS 2.2.1 at least
      o all denormals are truncated to 0 on Darwin, because disabling
        that also causes kernel panics on iPhoneOS 2.2.1 (probably
        because otherwise denormals can also cause exceptions)
    * set softfloat rounding mode correctly for non-wince/darwin/vfp
      targets
    + compiler support: only half the number of single precision
      registers is available due to limitations of the register
      allocator
    + added a number of comments about why the stackframe on ARM is
      set up the way it is by the compiler
    + added regtype and subregtype info to regsets, because they're
      also used for VFP registers (+ support in assembler reader)
    + various generic support routines for dealing with floating point
      values located in integer registers that have to be transferred to
      mm registers (needed for VFP)
    * renamed use_sse() to use_vectorfpu() and also use it for
      ARM/vfp support
    o only superficially tested for Linux (compiler compiled with -Cpvfpv6
      -Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
      the fpu exception handler still needs to be implemented), Darwin has
      been tested more thoroughly
  + added ARMv6 cpu type and made it default for Darwin/ARM
  + ARMv6+ implementations of atomic operations using ldrex/strex
  * don't use r9 on Darwin/ARM, as it's reserved under certain
    circumstances (don't know yet which ones)
  * changed C-test object files for ARM/Darwin to ARMv6 versions
  * check in assembler reader that regsets are not empty, because
    instructions with a regset operand have undefined behaviour in that
    case
  * fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
    int64->single type conversion
  * fixed constant pool locations in case 64 bit constants are generated,
    and/or when vfp instructions with limited reach are present

  WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
    code with -Cparmv6 (or higher), or you will get crashes. The reason is
    that storing/restoring multiple VFP registers must happen using
    different instructions on pre/post-ARMv6.

git-svn-id: trunk@14317 -
2009-12-03 22:46:30 +00:00
Jonas Maebe
7d459cf12a * the compiler now explicitly keeps track of the minimally guaranteed
alignment for each memory reference (mantis #12137, and
    test/packages/fcl-registry/tregistry1.pp on sparc). This also
    enables better code generation for packed records in many cases.
  o several changes were made to the compiler to minimise the chances
    of accidentally forgetting to set the alignment of memory references
    in the future:
    - reference_reset*() now has an extra alignment parameter
    - location_reset() can now only be used for non LOC_(C)REFERENCE,
      use location_reset_ref() for those (split the tloc enum so the
      compiler can catch errors using range checking)

git-svn-id: trunk@12719 -
2009-02-08 13:00:24 +00:00
yury
b70bf05ad5 * I hope it's proper fix for r10688.
git-svn-id: trunk@10690 -
2008-04-18 10:51:56 +00:00
yury
e71d631c24 * Fix for tw10233 for all CPUs.
git-svn-id: trunk@10688 -
2008-04-18 07:38:25 +00:00
yury
771479e65c * Improved fix for bug #10233 for better Delphi compatibility and efficiency:
- Explicit typecasts like LongBool(byte_value) do not change ordinal value.
  - Explicit typecasts like ByteBool(longint_value) do not change ordinal value and can lead to data loss if longint_value is outside of ByteBool range.
  - Explicit typecasts like ByteBool(LongBool) handle type ranges correctly.
  - Updated test tw10233.pp. It is passed by Delphi as well.

git-svn-id: trunk@10672 -
2008-04-15 22:19:29 +00:00
yury
cf235145cb * Fixed a_load_reg_reg for arm.
* Fixed sign/zero-extension in second_int_to_bool for all CPUs. x86 and pppc were not affected by this bug, but I fixed it for all CPUs for consistency.
* cg/tcnvint1 is passed on arm now.

git-svn-id: trunk@10669 -
2008-04-15 20:44:27 +00:00
Jonas Maebe
62e66d2a56 * explicit typecasting of any ordinal type to a boolean of the same
size must happen without any mangling of the value (mantis #11027)
  * moved checking for signed-to-unsigned (or vice versa) type
    conversions in assignments from htypechk to ncnv (where there
    was already code for similar checks) and added support for
    bool_to_bool there as well

git-svn-id: trunk@10521 -
2008-03-21 14:44:58 +00:00
Jonas Maebe
8349cde7db * changed byte/word/longbool to be Delphi-compatible (+ similar changes
for qwordbool) + test:
    o assigning true to such a variable now sets them to $ff/$ffff/$ffffffff
    o these types are now all signed
    o converting an integer type to a byte/word/long/qwordbool using an
      explicit type cast keeps the integer's original value stored in the
      bool, instead of forcing it to ord(true)/ord(false)
    (mantis #10233 and #10613, implemented for all architectures, testsuite
     tested for ppc32, sparc and x86)
  * fixed some places where the rtl depended on longbool(true) having the
    value 1
  * extended several boolean tests (and adapted some to no longer assume
    that byte/word/long/qwordbool(true)=1)
  + support for converting to qwordbool in second_int_to_bool for x86, ppc
    and sparc

git-svn-id: trunk@9898 -
2008-01-24 21:30:55 +00:00
peter
6b8aed593f * remove registers{int/mmx/fpu} from firstpass
* small cleanups of unused variables in firstpass
  * node_resources_fpu() created to get an approximation of the
    required fpu registers
  * for the moment use node_complexity in the CG until the
    node_resource_int() is created

git-svn-id: trunk@8655 -
2007-09-26 21:12:01 +00:00
florian
a3d906f1ca - removed several ;;
git-svn-id: trunk@7498 -
2007-05-28 15:59:17 +00:00
florian
0fd3498892 * fixed longint -> real, was broken in 6153
git-svn-id: trunk@6257 -
2007-01-28 21:27:21 +00:00
florian
4e69739a78 * fixed dword -> single
git-svn-id: trunk@6155 -
2007-01-23 22:12:13 +00:00
florian
df44f7c231 * fixed dword -> double in fpa mode
git-svn-id: trunk@6153 -
2007-01-23 21:07:09 +00:00
florian
4cbb67aa00 * some fpu emulation code from arm to generic code generator moved
* several m68k fixes

git-svn-id: trunk@5218 -
2006-11-04 10:23:35 +00:00
peter
658c46b903 * remove tdictionary and tindexarray
* symtables based on TFPHashObjectList and TFPObjectList
  * rename torddef.typ to torddef.ordtype
  * rename tfloatdef.typ to tfloatdef.floattype
  * rename tdef.deftype to tdef.typ
  * remove obsolete browser code, browcol is kept so the ide
    can still be compiled

git-svn-id: trunk@5192 -
2006-11-03 00:30:30 +00:00
florian
85d63d9fa9 * settings refactored
git-svn-id: trunk@5094 -
2006-10-30 18:02:58 +00:00
peter
3078a1927f * remove ttype
* rename old ttype variables *type to *def
  * rename resulttypepass to pass_typecheck
  * rename pass_2 to pass_generate_code

git-svn-id: trunk@5077 -
2006-10-29 22:19:39 +00:00
florian
67aa148602 * fixed softfpu support
+ softfpu enabled for arm-gba

git-svn-id: trunk@4939 -
2006-10-15 21:31:27 +00:00
peter
b7fe6797bf Merged revisions 2921-2922,2925 via svnmerge from
http://svn.freepascal.org/svn/fpc/branches/linker/compiler

........
r2921 | peter | 2006-03-15 08:35:00 +0100 (Wed, 15 Mar 2006) | 2 lines

  * pass ObjectWriter to ObjectOuput

........
r2922 | peter | 2006-03-15 12:40:30 +0100 (Wed, 15 Mar 2006) | 2 lines

  * refactor asmdata

........
r2925 | peter | 2006-03-15 16:09:39 +0100 (Wed, 15 Mar 2006) | 3 lines

  * add cfi to asmdata
  * move asmlist, asmcfi, asmdata to own unit

........

git-svn-id: trunk@2932 -
2006-03-16 08:52:22 +00:00
peter
a3ab2053c9 * support multiple asmlabel types, renamed getlabel to
getjumplabel and added type para to getlabel for specific types
  * moved lineinfo generation from assemble and aggas to dbgstabs

git-svn-id: trunk@1120 -
2005-09-18 21:16:10 +00:00
florian
a53c9e2666 * fixed stupid copy/paste which turned softfloat always off
* fixed wince softfloat compiler proc. to be correctly named also when used outside the system unit

git-svn-id: trunk@966 -
2005-08-28 21:08:23 +00:00
florian
adb193497d + softfloat support for wince
* more units are build for wince

git-svn-id: trunk@959 -
2005-08-28 12:40:43 +00:00
fpc
790a4fe2d3 * log and id tags removed
git-svn-id: trunk@42 -
2005-05-21 09:42:41 +00:00
fpc
50778076c3 initial import
git-svn-id: trunk@1 -
2005-05-16 18:37:41 +00:00
peter
e417e34496 * truncate log 2005-02-14 17:13:06 +00:00
florian
22d9294ab3 + overflow checking for the arm 2005-02-13 18:55:19 +00:00
florian
13618bb9cd * fixed currency division 2004-11-01 12:10:26 +00:00
peter
c95a859f0a * generic tlocation
* move tlocation to cgutils
2004-10-31 21:45:02 +00:00
florian
60f0434585 * fixed compilation of arm compiler 2004-10-24 07:54:25 +00:00
florian
8a9758c5e2 * logs truncated 2004-06-20 08:55:28 +00:00
peter
ecfbbeffc3 * renamed xNNbittype to xNNinttype
* renamed registers32 to registersint
  * replace some s32bit,u32bit with torddef([su]inttype).def.typ
2004-02-03 22:32:53 +00:00
florian
e7aba71412 * fixed several issues with flags 2004-01-22 20:13:18 +00:00
florian
a567970402 * fixed several arm related problems 2003-11-30 19:35:29 +00:00
florian
8b337fb5ef + type cast variant<->enum
* cnv. node second pass uses now as well helper wrappers
2003-11-04 22:30:15 +00:00
florian
a9d9a15e20 * fixed ARM for new reg. allocation scheme 2003-11-02 14:30:03 +00:00
florian
6264028af1 * fixed reference handling
* fixed operand postfix for floating point instructions
  * fixed wrong shifter constant handling
2003-09-01 15:11:16 +00:00
florian
e36c23db74 * results of work on arm port last weekend 2003-09-01 09:54:57 +00:00
florian
f3266351dc + started to implement FPU support for the ARM
* fixed a lot of other things
2003-08-25 23:20:38 +00:00
florian
dc22fe7863 * continued to work on the arm skeleton 2003-08-21 23:23:59 +00:00