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daf13d8750
Commit Graph

1515 Commits

Author SHA1 Message Date
nickysn
daf13d8750 * print a "Cannot use local variable or parameters here" error (instead of 
internal error) in case of expressions that add two local variables using the
  [expr1[expr2]] syntax

git-svn-id: trunk@38514 -
 2018-03-13 12:25:54 +00:00
florian
8b0bbdcaab * fix flag subregs after r38206 
git-svn-id: trunk@38502 -
 2018-03-11 20:30:11 +00:00
florian
9b18e39c81 * enable Lea2AddBase and Lea2AddIndex in TX86AsmOptimizer.PostPeepholeOptLea as we have flag tracking now 
* some flag allocations fixed

git-svn-id: trunk@38501 -
 2018-03-11 20:30:09 +00:00
florian
d86ffb9bfb + tcg.a_op_loc_reg 
+ optimized tx86addnode.second_ordinal for x86

git-svn-id: trunk@38500 -
 2018-03-11 16:32:26 +00:00
florian
5fbecc5501 + use TX86AsmOptimizer.OptPass1SHLSAL on x86-64 
git-svn-id: trunk@38499 -
 2018-03-11 14:35:22 +00:00
florian
47927f053a * factored out TX86AsmOptimizer.OptPass1SHLSAL 
git-svn-id: trunk@38498 -
 2018-03-11 14:35:19 +00:00
nickysn
77c782c89b * when adding OPR_LOCAL with OPR_REFERENCE in tx86intreader.AddReferences, add 
the offsets correctly:
    1) localconstoffset is added with constoffset
    2) localsymofs is added with ref.offset

git-svn-id: trunk@38470 -
 2018-03-09 14:17:19 +00:00
nickysn
68be282507 + support adding an OPR_REFERENCE to a OPR_LOCAL in the x86 intel syntax asm 
reader; this fixes stuff like 'mov ax,cs:localvar[5]'

git-svn-id: trunk@38457 -
 2018-03-08 14:32:31 +00:00
florian
78878f59b1 + generic TAOptObj.AllocRegBetween 
- removed x86 specific AllocRegBetween

git-svn-id: trunk@38445 -
 2018-03-07 22:17:35 +00:00
nickysn
6e79c8ba86 + support adding an OPR_LOCAL to a OPR_REFERENCE in 
tx86intreader.AddReferences(); this allows things like mov ax,[cs:[local]] to
  work

git-svn-id: trunk@38444 -
 2018-03-07 17:31:25 +00:00
nickysn
d3cb61b651 * refactored tx86intreader.AddReferences to use a pair of case statements, 
depending on the combination of operand types; this is done, so that adding
  OPR_LOCAL with OPR_REFERENCE operands can be supported later.

git-svn-id: trunk@38443 -
 2018-03-07 16:43:39 +00:00
marco
f0042a4719 * vcmppd hardcoded primitives like vcmpeqpd. 
* required increasing maxinfolen to 9 

git-svn-id: trunk@38404 -
 2018-03-03 23:32:54 +00:00
marco
f21a141144 * mantis #32001, add 32 vcmpps variants. 
git-svn-id: trunk@38403 -
 2018-03-03 23:10:03 +00:00
nickysn
2cee948b72 + support segment overrides in inline asm references to local variables or parameters on x86 
git-svn-id: trunk@38392 -
 2018-03-01 17:59:57 +00:00
nickysn
df6a870873 * print an "invalid segment override expression" error message in case a segment 
override uses an invalid (non-segment) register in the x86 inline asm reader
  (both for intel and att syntax)

git-svn-id: trunk@38391 -
 2018-03-01 15:34:16 +00:00
nickysn
c93c15429d + introduce tx86intreader.SetSegmentOverride(); using it everywhere adds more 
checks for duplicated segment overrides (which cause a warning in TP mode and
  an error in all the other compiler modes)

git-svn-id: trunk@38384 -
 2018-02-28 17:16:50 +00:00
nickysn
6f8abde786 + support [const+[ref]] in the x86 intel syntax asm reader 
git-svn-id: trunk@38383 -
 2018-02-28 16:24:45 +00:00
nickysn
8ffde52974 + also support [expr1]+[expr2] for adding references in the x86 intel syntax asm reader 
git-svn-id: trunk@38381 -
 2018-02-28 15:48:48 +00:00
florian
2385c47c28 * compilation on x86-64 fixed 
git-svn-id: trunk@38370 -
 2018-02-27 21:54:12 +00:00
florian
8c5606b41d + support mmx shifting 
git-svn-id: trunk@38367 -
 2018-02-27 21:40:12 +00:00
nickysn
9c814e42c9 + support segment overrides inside references (e.g. [es:bx]) in the x86 intel 
syntax inline asm reader

git-svn-id: trunk@38365 -
 2018-02-27 17:29:46 +00:00
nickysn
1cf1ab8ab9 * consume the register in the reference before the check for invalid reference 
syntax in the x86 intel syntax asm reader; this is preparation for support of
  segment overrides inside the reference expression (i.e. [es:bx] instead of
  es:[bx])

git-svn-id: trunk@38363 -
 2018-02-27 16:35:55 +00:00
nickysn
f623038da6 + fixed a bug in the previous commit, when adding two references, the first 
containing a base register, the second - an index register with a scalefactor.
  The scalefactor was ignored in this case.

git-svn-id: trunk@38354 -
 2018-02-26 17:30:08 +00:00
nickysn
45fdd7655d + support concatenation of references in x86 intel syntax inline asm: 
[expr1][expr2] = [expr1+expr2]
  [expr1[expr2]] = [expr1+expr2]
  This is compatible with TP7's inline asm, and perhaps also with tasm/masm/delphi.

git-svn-id: trunk@38352 -
 2018-02-26 17:17:47 +00:00
florian
c5f8567ed7 * getsubreg => getsupreg 
git-svn-id: trunk@38344 -
 2018-02-25 15:34:14 +00:00
florian
fc6c0e8ef4 + AndShlToShl optimization 
* moved topsize2memsize to cpubase

git-svn-id: trunk@38343 -
 2018-02-25 15:34:12 +00:00
florian
6e811d057c * MovOpMov2Op cannot be applied for L, Q, Q as operand sizes 
+ test

git-svn-id: trunk@38337 -
 2018-02-25 10:19:52 +00:00
florian
98bd768521 * remove type cast of the parameter of int(...), if an instruction is available which can be used directly 
git-svn-id: trunk@38335 -
 2018-02-24 23:13:27 +00:00
florian
3b779278e2 + (slightly) patch by Emelyanov Roman to add support of SEH directive in FPC internal assembler with INTEL syntax, resolves #29894 
git-svn-id: trunk@38331 -
 2018-02-24 16:14:08 +00:00
nickysn
506d5fe30e + support bracketless references in the x86 intel syntax; ugly, but TP7 (and 
perhaps also Delphi, TASM and MASM)-compatible

git-svn-id: trunk@38296 -
 2018-02-20 17:18:09 +00:00
florian
e92422383a * compilation fixed 
git-svn-id: trunk@38280 -
 2018-02-18 09:29:36 +00:00
florian
91514da267 * factored out TX86AsmOptimizer.PostPeepholeOptCall 
+ use TX86AsmOptimizer.PostPeepholeOptCall on x86-64

git-svn-id: trunk@38278 -
 2018-02-17 23:25:01 +00:00
florian
1b3627add1 + peephole optimization MovMov2Mov 5 
git-svn-id: trunk@38273 -
 2018-02-17 21:10:51 +00:00
florian
5eb59196d5 * remove sequential moves to the same register 
+ test

git-svn-id: trunk@38267 -
 2018-02-17 12:45:17 +00:00
florian
99f1fe54af * check for registers removed which is not needed anymore 
git-svn-id: trunk@38265 -
 2018-02-17 12:45:13 +00:00
florian
f66a91499d * FPC uses meanwhile more mov instructions, so extended taicpu.is_same_reg_move to support them 
git-svn-id: trunk@38264 -
 2018-02-17 09:45:19 +00:00
pierre
55289c13e4 Use af_no_stabs for clang assembler which does not support stabs debug format 
git-svn-id: trunk@38238 -
 2018-02-14 15:09:35 +00:00
florian
381cf78ff1 * there is no vmovq for mmx registers 
git-svn-id: trunk@38208 -
 2018-02-11 17:50:41 +00:00
florian
31f78ea2b6 + implementation of the vectorcall calling convention by J. Gareth Moreton 
+ tests

git-svn-id: trunk@38206 -
 2018-02-11 17:50:37 +00:00
florian
092223f400 * comment links to test now 
git-svn-id: trunk@38204 -
 2018-02-11 16:38:33 +00:00
florian
e5ebc65cce * if si and di are allocated on i8086, using an index in references is not possible anymore 
git-svn-id: trunk@38203 -
 2018-02-11 15:54:37 +00:00
nickysn
ae6a4030c3 + support evaluation of recordtype*constant in the intel syntax inline asm. 
The recordtype itself is evaluated to 0. This makes e.g.
  'test [di+recordtype*5], 1' work. This is TP7 compatible.

git-svn-id: trunk@38200 -
 2018-02-11 03:42:45 +00:00
nickysn
f0765421eb + also set the operand size in constants like recordtype (without addressing a 
record field). This makes e.g.
    test [di + recordtype], 1
  work and use the size of recordtype to determine the operand size; recordtype
  itself is evaluated to 0, so if recordtype's size is 2 bytes, the above
  instruction assembles as:
    test word ptr [di], 1
  Ugly, but TP7 compatible.

git-svn-id: trunk@38176 -
 2018-02-09 17:43:31 +00:00
nickysn
7338437dcd * allow recordtype.recordfield constants to set the operand size; this makes things like 
test [di + recordtype.recordfield], 1
  work, as long as the size of recordfield is a valid operand size for the target

git-svn-id: trunk@38175 -
 2018-02-09 17:36:54 +00:00
nickysn
f829f70186 * use the 'size' return value of BuildConstSymbolExpression to set the operand size 
git-svn-id: trunk@38174 -
 2018-02-09 17:22:39 +00:00
nickysn
384715be8d + add an extra output parameter 'size' to tx86intreader.BuildConstSymbolExpression, 
which allows const symbol expressions to also have a size sometimes. Why?
  Because TP7 (and perhaps Delphi) allows not specifying the size in e.g.
    test [di+recordtype.recordfield], 1
  in this case, the operand size (byte ptr, word ptr, dword ptr, qword ptr) is
  determined by the size of recordtype.recordfield; this already happens with
  variables, but in this case, this is a type.field, which is resolved to a
  constant.
  This commit only adds a dummy 'size' parameter, which is always initialized to
  0 and not used. The actual implementation of the above will follow in separate
  commits.

git-svn-id: trunk@38173 -
 2018-02-09 16:52:12 +00:00
nickysn
4b339fd133 * convert the 'var' parameters of tx86intreader.BuildConstSymbolExpression to 'out' 
git-svn-id: trunk@38172 -
 2018-02-09 16:20:34 +00:00
nickysn
84611d716b * convert the 'var' parameters of tx86intreader.BuildRecordOffsetSize to 'out' 
git-svn-id: trunk@38171 -
 2018-02-09 16:15:40 +00:00
nickysn
391f85f828 + for TP7 compatibility, allow the '&', '$' and '?' characters in the x86 intel 
syntax inline asm reader

git-svn-id: trunk@38167 -
 2018-02-08 16:54:33 +00:00
nickysn
5f56f6ec11 * always pass a valid constsize to ConcatConstSymbol; this prevents a compiler 
internal error on i8086, generated by 'DB xx' or 'DB OFFSET xx'

git-svn-id: trunk@38153 -
 2018-02-07 16:17:05 +00:00