Commit Graph

72152 Commits

Author SHA1 Message Date
Michaël Van Canneyt
ec8887baf2 * Free Parameters 2025-06-19 11:59:55 +02:00
Michaël Van Canneyt
689a8f261f * Patch from Lacak to support DECFLOAT(16) type. Fixes issue #41185 2025-06-19 10:10:14 +02:00
Michaël Van Canneyt
083a059043 * Patch from Lacak to add support for densely packed decimal64 format 2025-06-19 10:10:14 +02:00
J. Gareth "Curious Kit" Moreton
6608fe6341 x86: Fixed syntax error when DEBUG_REGISTERLIFE is enabled 2025-06-18 21:53:54 +01:00
Rika Ichinose
df8c00e2bb Scan orphaned freelists for free space as a last chance before allocating new OS chunk. 2025-06-18 09:07:32 +00:00
Michaël Van Canneyt
9236829a3c * Correct begin..end 2025-06-17 20:01:06 +02:00
Martin
a291258bf8 Check condition before getting error address / only execute when needed 2025-06-17 13:45:39 +02:00
Martin
3a89160739 Move getting error address / only execute when needed 2025-06-17 13:43:31 +02:00
Martin
1d006185ef Add AssertEqual(AMessage, AFormatArgs, ....) 2025-06-17 13:36:51 +02:00
Martin
b203177315 Reduce calls to ComparisonMsg - Check for failure first 2025-06-17 13:22:04 +02:00
Martin
cd661989a5 Add missing CallerAddr 2025-06-17 13:22:03 +02:00
mattias
88d57454a0 fcl-net: fixed comments 2025-06-17 11:37:09 +02:00
Pierre Muller
c7275d0bde Set USE_MSWINDOWS_OLE macro on Windows OSes supporting OLE strings, and use it 2025-06-16 13:58:20 +00:00
Jonas Maebe
0cb047230f Fix cycle for non-LLVM 2025-06-15 23:06:49 +02:00
Jonas Maebe
aa516f34d0 LLVM: don't do anything for -OoUSELOADMODIFYSTORE
LLVM itself can do this itself already, and the FPC transformations
apparently don't respect the types so they generate invalid LLVM IR
2025-06-15 23:01:27 +02:00
Jonas Maebe
5f215e8126 LLVM: always added related high parameters to parentfpstruct
Sometimes the high parameter is only first accessed during the first
pass, while we already need to know everything that will go into the
parentfpstruct during the typechecking pass.

resolves #41282
2025-06-15 20:34:48 +02:00
mattias
ae45947cb4 pastojs: array of interface: started copy, concat, insert 2025-06-15 19:55:32 +02:00
mattias
0beb7870f3 fcl-passrc: less hints 2025-06-15 19:54:56 +02:00
marcoonthegit
134e964514 * ported mechanism from unit activex to deal with ansi/unicode -> widestring conversion.
* 2nd attempt, now under $IFDEF MSWINDOWS
2025-06-15 12:08:23 +02:00
Rika Ichinose
6473bc1e82 Remove HeapInc.gs.varOS. 2025-06-12 21:22:01 +03:00
Marco Van de Voort
f23dbc2ecb Revert "* ported mechanism from unit activex to deal with ansi/unicode -> widestring conversion."
This reverts commit 1208f4d5b9
2025-06-12 19:19:55 +02:00
marcoonthegit
1208f4d5b9 * ported mechanism from unit activex to deal with ansi/unicode -> widestring conversion.
Targeted at bug #41235
2025-06-12 19:11:53 +02:00
Pierre Muller
7566679eb0 Makefile regenerated after: Fix missing braces around PREPUP_OPT 2025-06-11 10:26:16 +00:00
Pierre Muller
778dec8f67 Fix missing braces around PREPUP_OPT 2025-06-11 10:25:54 +00:00
Michaël Van Canneyt
8ab1fa256e * FindValue more delphi-compatible in treatment of null 2025-06-10 15:51:30 +02:00
Michaël Van Canneyt
012dab8bd3 * Address error found in pas2js+test 2025-06-10 15:51:30 +02:00
Rika Ichinose
1cda7d8e36 REP MOVSB branch for x64 Move. 2025-06-09 19:42:03 +02:00
Rika Ichinose
bc59422f00 Allow shrinking small chunks. 2025-06-09 17:52:02 +02:00
J. Gareth "Curious Kit" Moreton
9d55e3aa0e * x86: Fixed bug where XMM7 wasn't used by the register allocator 2025-06-09 15:32:35 +02:00
florian
18f2553e8e * throw proper error if no suitable NewInstance method is found, resolves #41274 2025-06-09 15:31:38 +02:00
Rika Ichinose
a003040be1 Remove MaxKeptOSChunks (assume 1), GrowHeapSizeSmall, GrowHeapSize1. 2025-06-09 15:05:59 +02:00
Margers
a06068b4f1 Fix AOR. 2025-06-08 22:21:11 +02:00
Margers
a5fe90e392 Test instruction set AVX102. 2025-06-08 22:21:11 +02:00
Margers
d53ea44fe4 Generalize asm error message for distinct registers. 2025-06-08 22:21:11 +02:00
Margers
53cbfe3f85 Add x86 instruction set AVX102 for targets i386 and i8086. 2025-06-08 22:21:11 +02:00
Margers
45d8ffe13d Add x86 instruction set AVX102. 2025-06-08 22:21:11 +02:00
Margers
b274091fe8 Add tmm registers. 2025-06-08 22:21:11 +02:00
Margers
a70129f394 Instruction flag AVX102. 2025-06-08 22:21:11 +02:00
Margers
1a5ca1e4bb Instruction match tests supported register numbers. Thx to VMPSADBW. 2025-06-08 22:21:11 +02:00
Margers
5745635a71 Support ModRM 11:rrr:000. Only for TILEZERO. 2025-06-08 22:21:11 +02:00
Margers
1d72eeb2cf Support for ymmreg_sae, ymmreg_er. 2025-06-08 22:21:11 +02:00
Margers
0b0033f53c Support for sibmem. 2025-06-08 22:21:11 +02:00
Margers
8a836ccafc Support for tmmreg. 2025-06-08 22:21:11 +02:00
Margers
f635354042 Allow more than 255 registers. 2025-06-08 22:21:11 +02:00
florian
8720ab7d3d * fix rlim_t for i386 and other 32 bit CPUs supporting 64 bit fs calls 2025-06-08 14:23:58 +02:00
J. Gareth "Curious Kit" Moreton
98d8830eb7 * x86: Refactored and optimised "PostPeepholeOptLea" 2025-06-08 12:20:11 +01:00
J. Gareth "Curious Kit" Moreton
98563dd069 * x86: New post-peephole optimisation that converts 32-bit registers
in a LEA reference to 64-bit if the destination is 32-bit
2025-06-08 12:20:03 +01:00
Pierre Muller
71cc17d60d Also downgrade alignment warning about variables to a note 2025-06-06 06:37:18 +00:00
Pierre Muller
f9fbbd4a88 Do not set alignment above varalignmax, as this breaks msdos/win16 targets 2025-06-06 06:30:05 +00:00
Michaël Van Canneyt
6870e68f4e * Remove underscores from tex code 2025-06-06 08:04:16 +02:00