5 Commits

Author	SHA1	Message	Date
Jonas Maebe	f1fb880f18	* fixed debug register values for vector registers ... git-svn-id: trunk@29942 -	2015-02-23 22:54:15 +00:00
Jonas Maebe	9c55fa6f6c	+ FPCR, FPSR and TPIDR registers ... git-svn-id: trunk@29878 -	2015-02-23 22:50:44 +00:00
Jonas Maebe	f1b619a942	* made (X|W)ZR and (W)SP separate registers, because a number of ... instructions can use either depending on the encoding git-svn-id: trunk@29831 -	2015-02-23 22:48:21 +00:00
florian	ca75588989	+ first cpubase implementation for aarch64 ... git-svn-id: trunk@22901 -	2012-11-01 17:18:25 +00:00
florian	5af1d48158	+ register definitions for AArch64 aka ARM64 ... + Lazarus project for AArch64 Since AArch64 is very different from 32 Bit ARM, both won't share code in the compiler git-svn-id: trunk@22894 -	2012-10-31 21:46:01 +00:00