..
a64att.inc
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
2015-05-14 14:42:12 +00:00
a64atts.inc
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
2015-05-14 14:42:12 +00:00
a64ins.dat
* added some missing instructions and aliases, reordered them according
2015-02-23 22:48:24 +00:00
a64nop.inc
a64op.inc
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
2015-05-14 14:42:12 +00:00
a64reg.dat
* fixed debug register values for vector registers
2015-02-23 22:54:15 +00:00
a64tab.inc
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
2015-05-14 14:42:12 +00:00
aasmcpu.pas
--- Merging r49312 into '.':
2021-05-01 15:41:39 +00:00
agcpugas.pas
* merged macOS/AArch64 support + revisions these changes depended on
2020-09-15 19:40:36 +00:00
aoptcpu.pas
aoptcpub.pas
* completed TAoptBaseCpu.RegModifiedByInstruction()
2015-02-23 22:53:23 +00:00
aoptcpud.pas
cgcpu.pas
--- Merging r49040 into '.':
2021-04-03 09:12:47 +00:00
cpubase.pas
Merge of trunk commits 39983,39986,40109
2018-12-06 22:17:57 +00:00
cpuinfo.pas
Merge of several commits related to enhancements in PPU writing
2019-11-04 08:50:42 +00:00
cpunode.pas
* automatically generate necessary indirect symbols when a new assembler
2016-07-20 20:53:03 +00:00
cpupara.pas
r47711 | pierre | 2020-12-07 16:35:46 +0000 (Mon, 07 Dec 2020) | 9 lines
2020-12-08 12:26:12 +00:00
cpupi.pas
* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
2016-12-16 22:41:21 +00:00
cputarg.pas
* merged macOS/AArch64 support + revisions these changes depended on
2020-09-15 19:40:36 +00:00
hlcgcpu.pas
--- Merging r49236 into '.':
2021-04-19 20:52:46 +00:00
itcpugas.pas
+ ARM64 GAS instruction table unit
2012-11-01 20:09:47 +00:00
ncpuadd.pas
Merge commits 42525 and 45891 that add
2020-08-04 10:30:50 +00:00
ncpucnv.pas
* replaced current_procinfo.currtrue/falselabel with storing the true/false
2015-08-27 18:28:57 +00:00
ncpuinl.pas
Merge commits 42525 and 45891 that add
2020-08-04 10:30:50 +00:00
ncpumat.pas
Merge commits 42525 and 45891 that add
2020-08-04 10:30:50 +00:00
ncpumem.pas
* keep track of the temp position separately from the offset in references,
2018-04-22 17:03:16 +00:00
ncpuset.pas
* let all the case code generation work with tconstexprint instead of aint,
2021-08-26 23:28:28 +02:00
ra64con.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64dwa.inc
* fixed debug register values for vector registers
2015-02-23 22:54:15 +00:00
ra64nor.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64num.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64rni.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64sri.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64sta.inc
* fixed debug register values for vector registers
2015-02-23 22:54:15 +00:00
ra64std.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64sup.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
racpu.pas
--- Merging r46880 into '.':
2020-12-11 15:40:07 +00:00
racpugas.pas
--- Merging r46880 into '.':
2020-12-11 15:40:07 +00:00
rgcpu.pas
--- Merging r49206 into '.':
2021-04-15 19:16:05 +00:00
symcpu.pas
o fixes handling of iso i/o parameters/program parameters:
2015-05-01 20:58:31 +00:00
tripletcpu.pas
* merged macOS/AArch64 support + revisions these changes depended on
2020-09-15 19:40:36 +00:00