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308 lines
7.5 KiB
PHP
308 lines
7.5 KiB
PHP
{
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This file is part of the Free Pascal run time library.
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Copyright (c) 2008 by the Free Pascal development team.
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Processor dependent implementation for the system unit for
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RiscV64
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See the file COPYING.FPC, included in this distribution,
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for details about the copyright.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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**********************************************************************}
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{ Common RiscV stuff }
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{$I ../riscv/riscv.inc}
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{****************************************************************************
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stack frame related stuff
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****************************************************************************}
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{$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
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function get_caller_addr(framebp:pointer;addr:pointer=nil):pointer;assembler;
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asm
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ld a0, -8*1(a0)
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end;
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{$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
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function get_caller_frame(framebp:pointer;addr:pointer=nil):pointer;assembler;
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asm
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ld a0, -8*2(a0)
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end;
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{****************************************************************************
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atomic operations
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****************************************************************************}
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{$ifdef VER3_2}
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function InterLockedDecrement (var Target: longint) : longint; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_DEC_32}
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function fpc_atomic_dec_32 (var Target: longint) : longint; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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addi a1, x0, -1
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amoadd.w a0, a1, (a0)
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addw a0, a0, a1
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{$else CPURV_HAS_ATOMIC}
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lw a1, 0(a0)
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addiw a1, a1, -1
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sw a1, 0(a0)
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addi a0, a1, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_INC_32}
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function fpc_atomic_inc_32 (var Target: longint) : longint; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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addi a1, x0, 1
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amoadd.w a0, a1, (a0)
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addw a0, a0, a1
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{$else CPURV_HAS_ATOMIC}
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lw a1, 0(a0)
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addiw a1, a1, 1
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sw a1, 0(a0)
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addi a0, a1, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_XCHG_32}
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function fpc_atomic_xchg_32 (var Target: longint;Source : longint) : longint; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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amoswap.w a0, a1, (a0)
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{$else CPURV_HAS_ATOMIC}
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lw a2, 0(a0)
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sw a1, 0(a0)
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addi a0, a2, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_CMP_XCHG_32}
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function fpc_atomic_cmp_xchg_32 (var Target: longint; NewValue: longint; Comparand: longint) : longint; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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.LLoop:
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lr.w a3, 0(a0)
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bne a3, a2, .LFail
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sc.w a4, a1, 0(a0)
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bne a4, x0, .LLoop
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.LFail:
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addi a0, a3, 0
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{$else CPURV_HAS_ATOMIC}
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lw a3, 0(a0)
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bne a3, a2, .LFail
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sw a1, 0(a0)
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.LFail:
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addi a0, a3, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_ADD_32}
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function fpc_atomic_add_32 (var Target: longint;Value: longint) : longint; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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amoadd.w a0, a1, (a0)
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{$else CPURV_HAS_ATOMIC}
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lw a2, 0(a0)
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addw a2, a2, a1
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sw a2, 0(a0)
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addi a0, a2, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterLockedDecrement64 (var Target: int64) : int64; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_DEC_64}
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function fpc_atomic_dec_64 (var Target: int64) : int64; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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addi a1, x0, -1
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amoadd.d a0, a1, (a0)
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add a0, a0, a1
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{$else CPURV_HAS_ATOMIC}
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ld a1, 0(a0)
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addi a1, a1, -1
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sd a1, 0(a0)
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addi a0, a1, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterLockedIncrement64 (var Target: int64) : int64; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_INC_64}
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function fpc_atomic_inc_64 (var Target: int64) : int64; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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addi a1, x0, 1
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amoadd.d a0, a1, (a0)
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add a0, a0, a1
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{$else CPURV_HAS_ATOMIC}
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ld a1, 0(a0)
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addi a1, a1, 1
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sd a1, 0(a0)
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addi a0, a1, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterLockedExchange64 (var Target: int64;Source : int64) : int64; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_XCHG_64}
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function fpc_atomic_xchg_64 (var Target: int64;Source : int64) : int64; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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amoswap.d a0, a1, (a0)
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{$else CPURV_HAS_ATOMIC}
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ld a2, 0(a0)
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sd a1, 0(a0)
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addi a0, a2, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterlockedCompareExchange64(var Target: int64; NewValue: int64; Comperand: int64): int64; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_CMP_XCHG_64}
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function fpc_atomic_cmp_xchg_64 (var Target: int64; NewValue: int64; Comparand: int64) : int64; [public,alias:'FPC_ATOMIC_CMP_XCHG_64']; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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.LLoop:
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lr.d a3, 0(a0)
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bne a3, a2, .LFail
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sc.d a4, a1, 0(a0)
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bne a4, x0, .LLoop
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.LFail:
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addi a0, a3, 0
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{$else CPURV_HAS_ATOMIC}
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ld a3, 0(a0)
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bne a3, a2, .LFail
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sd a1, 0(a0)
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.LFail:
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addi a0, a3, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$ifdef VER3_2}
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function InterLockedExchangeAdd64 (var Target: int64;Source : int64) : int64; assembler; nostackframe;
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{$else VER3_2}
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{$define FPC_SYSTEM_HAS_ATOMIC_ADD_64}
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function fpc_atomic_add_64 (var Target: int64;Value : int64) : int64; assembler; nostackframe;
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{$endif VER3_2}
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asm
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{$ifdef CPURV_HAS_ATOMIC}
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amoadd.d a0, a1, (a0)
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{$else CPURV_HAS_ATOMIC}
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ld a2, 0(a0)
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add a2, a2, a1
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sd a2, 0(a0)
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addi a0, a2, 0
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{$endif CPURV_HAS_ATOMIC}
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end;
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{$define FPC_SYSTEM_HAS_DECLOCKED_INT64}
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function declocked(var l:int64):boolean;
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begin
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Result:=InterLockedDecrement64(l) = 0;
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end;
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{$define FPC_SYSTEM_HAS_INCLOCKED_INT64}
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procedure inclocked(var l:int64);
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begin
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InterLockedIncrement64(l);
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end;
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{$ifdef CPURV_HAS_ZBB}
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{$define FPC_SYSTEM_HAS_SWAPENDIAN}
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function SwapEndian(const AValue: SmallInt): SmallInt; assembler; nostackframe;
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asm
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rev8 a0, a0
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srli a0, a0, 48
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end;
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function SwapEndian(const AValue: Word): Word; assembler; nostackframe;
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asm
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rev8 a0, a0
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srli a0, a0, 48
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end;
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function SwapEndian(const AValue: LongInt): LongInt; assembler; nostackframe;
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asm
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rev8 a0, a0
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srli a0, a0, 32
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end;
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function SwapEndian(const AValue: DWord): DWord; assembler; nostackframe;
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asm
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rev8 a0, a0
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srli a0, a0, 32
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end;
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function SwapEndian(const AValue: Int64): Int64; assembler; nostackframe;
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asm
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rev8 a0, a0
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end;
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function SwapEndian(const AValue: QWord): QWord; assembler; nostackframe;
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asm
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rev8 a0, a0
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end;
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{$endif CPURV_HAS_ZBB}
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{$define FPC_SYSTEM_HAS_UMUL64X64_128}
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function UMul64x64_128(a,b: uint64; out rHi: uint64): uint64; assembler; nostackframe;
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asm
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mulhu a3,a0,a1
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mul a0,a0,a1
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sd a3,(a2)
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end;
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