mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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1c3fc6e2df
if not required, to avoid translating OS_C64 into OS_F64 (fix for x86
test failures after r45205)
git-svn-id: trunk@45221 -
(cherry picked from commit 3f6ad30b69)
845 lines
26 KiB
ObjectPascal
845 lines
26 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl
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Some basic types and constants for the code generation
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{# This unit exports some types which are used across the code generator }
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unit cgbase;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,
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symconst;
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type
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{ Location types where value can be stored }
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TCGLoc=(
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LOC_INVALID, { added for tracking problems}
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LOC_VOID, { no value is available }
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LOC_CONSTANT, { constant value }
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LOC_JUMP, { boolean results only, jump to false or true label }
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LOC_FLAGS, { boolean results only, flags are set }
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LOC_REGISTER, { in a processor register }
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LOC_CREGISTER, { Constant register which shouldn't be modified }
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LOC_FPUREGISTER, { FPU stack }
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LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
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LOC_MMXREGISTER, { MMX register }
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{ MMX register variable }
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LOC_CMMXREGISTER,
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{ multimedia register }
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LOC_MMREGISTER,
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{ Constant multimedia reg which shouldn't be modified }
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LOC_CMMREGISTER,
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{ contiguous subset of bits of an integer register }
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LOC_SUBSETREG,
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LOC_CSUBSETREG,
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{ contiguous subset of bits in memory }
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LOC_SUBSETREF,
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LOC_CSUBSETREF,
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{ keep these last for range checking purposes }
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LOC_CREFERENCE, { in memory constant value reference (cannot change) }
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LOC_REFERENCE { in memory value }
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);
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TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
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TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
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{ since we have only 16bit offsets, we need to be able to specify the high
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and lower 16 bits of the address of a symbol of up to 64 bit }
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trefaddr = (
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addr_no,
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addr_full,
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addr_pic,
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addr_pic_no_got
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{$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS) or defined(SPARC64)}
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,
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addr_low, // bits 48-63
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addr_high, // bits 32-47
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{$IF defined(POWERPC64)}
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addr_higher, // bits 16-31
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addr_highest, // bits 00-15
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{$ENDIF}
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addr_higha // bits 16-31, adjusted
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{$IF defined(POWERPC64)}
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,
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addr_highera, // bits 32-47, adjusted
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addr_highesta // bits 48-63, adjusted
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{$ENDIF}
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{$ENDIF POWERPC or POWERPC64 or SPARC or MIPS or SPARC64}
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{$IFDEF MIPS}
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,
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addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
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addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
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addr_high_pic,
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addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
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addr_high_call
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{$ENDIF}
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{$IFDEF AVR}
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,addr_lo8
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,addr_lo8_gs
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,addr_hi8
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,addr_hi8_gs
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{$ENDIF}
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{$IFDEF i8086}
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,addr_dgroup // the data segment group
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,addr_fardataseg // the far data segment of the current pascal module (unit or program)
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,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
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{$ENDIF}
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{$IFDEF AARCH64}
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,addr_page
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,addr_pageoffset
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,addr_gotpage
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,addr_gotpageoffset
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{$ENDIF AARCH64}
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{$ifdef SPARC64}
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,addr_gdop_hix22
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,addr_gdop_lox22
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{$endif SPARC64}
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);
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{# Generic opcodes, which must be supported by all processors
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}
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topcg =
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(
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OP_NONE,
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OP_MOVE, { replaced operation with direct load }
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OP_ADD, { simple addition }
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OP_AND, { simple logical and }
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OP_DIV, { simple unsigned division }
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OP_IDIV, { simple signed division }
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OP_IMUL, { simple signed multiply }
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OP_MUL, { simple unsigned multiply }
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OP_NEG, { simple negate }
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OP_NOT, { simple logical not }
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OP_OR, { simple logical or }
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OP_SAR, { arithmetic shift-right }
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OP_SHL, { logical shift left }
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OP_SHR, { logical shift right }
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OP_SUB, { simple subtraction }
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OP_XOR, { simple exclusive or }
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OP_ROL, { rotate left }
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OP_ROR { rotate right }
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);
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{# Generic flag values - used for jump locations }
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TOpCmp =
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(
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OC_NONE,
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OC_EQ, { equality comparison }
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OC_GT, { greater than (signed) }
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OC_LT, { less than (signed) }
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OC_GTE, { greater or equal than (signed) }
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OC_LTE, { less or equal than (signed) }
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OC_NE, { not equal }
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OC_BE, { less or equal than (unsigned) }
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OC_B, { less than (unsigned) }
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OC_AE, { greater or equal than (unsigned) }
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OC_A { greater than (unsigned) }
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);
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{ indirect symbol flags }
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tindsymflag = (is_data,is_weak);
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tindsymflags = set of tindsymflag;
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{ OS_NO is also used memory references with large data that can
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not be loaded in a register directly }
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TCgSize = (OS_NO,
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OS_8, OS_16, OS_32, OS_64, OS_128,
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OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
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{ single, double, extended, comp, float128 }
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OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
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{ multi-media sizes, describes only the register size but not how it is split,
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this information must be passed separately }
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
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{ Register types }
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TRegisterType = (
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R_INVALIDREGISTER, { = 0 }
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R_INTREGISTER, { = 1 }
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R_FPUREGISTER, { = 2 }
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{ used by Intel only }
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R_MMXREGISTER, { = 3 }
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R_MMREGISTER, { = 4 }
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R_SPECIALREGISTER, { = 5 }
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R_ADDRESSREGISTER, { = 6 }
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{ used on llvm, every temp gets its own "base register" }
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R_TEMPREGISTER { = 7 }
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);
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{ Sub registers }
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TSubRegister = (
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R_SUBNONE, { = 0; no sub register possible }
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R_SUBL, { = 1; 8 bits, Like AL }
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R_SUBH, { = 2; 8 bits, Like AH }
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R_SUBW, { = 3; 16 bits, Like AX }
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R_SUBD, { = 4; 32 bits, Like EAX }
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R_SUBQ, { = 5; 64 bits, Like RAX }
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{ For Sparc floats that use F0:F1 to store doubles }
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R_SUBFS, { = 6; Float that allocates 1 FPU register }
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R_SUBFD, { = 7; Float that allocates 2 FPU registers }
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R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
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R_SUBMMS, { = 9; single scalar in multi media register }
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R_SUBMMD, { = 10; double scalar in multi media register }
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R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
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{ For Intel X86 AVX-Register }
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R_SUBMMX, { = 12; 128 BITS }
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R_SUBMMY, { = 13; 256 BITS }
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R_SUBMMZ, { = 14; 512 BITS }
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{ Subregisters for the flags register (x86) }
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R_SUBFLAGCARRY, { = 15; Carry flag }
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R_SUBFLAGPARITY, { = 16; Parity flag }
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R_SUBFLAGAUXILIARY, { = 17; Auxiliary flag }
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R_SUBFLAGZERO, { = 18; Zero flag }
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R_SUBFLAGSIGN, { = 19; Sign flag }
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R_SUBFLAGOVERFLOW, { = 20; Overflow flag }
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R_SUBFLAGINTERRUPT, { = 21; Interrupt enable flag }
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R_SUBFLAGDIRECTION { = 22; Direction flag }
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);
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TSubRegisterSet = set of TSubRegister;
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TSuperRegister = type word;
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{
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The new register coding:
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SuperRegister (bits 0..15)
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Subregister (bits 16..23)
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Register type (bits 24..31)
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TRegister is defined as an enum to make it incompatible
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with TSuperRegister to avoid mixing them
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}
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TRegister = (
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TRegisterLowEnum := Low(longint),
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TRegisterHighEnum := High(longint)
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);
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TRegisterRec=packed record
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{$ifdef FPC_BIG_ENDIAN}
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regtype : Tregistertype;
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subreg : Tsubregister;
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supreg : Tsuperregister;
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{$else FPC_BIG_ENDIAN}
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supreg : Tsuperregister;
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subreg : Tsubregister;
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regtype : Tregistertype;
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{$endif FPC_BIG_ENDIAN}
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end;
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{ A type to store register locations for 64 Bit values. }
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{$ifdef cpu64bitalu}
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tregister64 = tregister;
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tregister128 = record
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reglo,reghi : tregister;
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end;
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{$else cpu64bitalu}
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tregister64 = record
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reglo,reghi : tregister;
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end;
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{$endif cpu64bitalu}
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Tregistermmxset = record
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reg0,reg1,reg2,reg3:Tregister
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end;
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{ Set type definition for registers }
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tsuperregisterset = array[byte] of set of byte;
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pmmshuffle = ^tmmshuffle;
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{ this record describes shuffle operations for mm operations; if a pointer a shuffle record
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passed to an mm operation is nil, it means that the whole location is moved }
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tmmshuffle = record
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{ describes how many shuffles are actually described, if len=0 then
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moving the scalar with index 0 to the scalar with index 0 is meant }
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len : byte;
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{ lower nibble of each entry of this array describes index of the source data index while
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the upper nibble describes the destination index }
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shuffles : array[1..1] of byte;
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end;
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Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
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Psuperregisterarray=^Tsuperregisterarray;
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Tsuperregisterworklist=object
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buflength,
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buflengthinc,
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length:word;
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buf:Psuperregisterarray;
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constructor init;
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constructor copyfrom(const x:Tsuperregisterworklist);
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destructor done;
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procedure clear;
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procedure add(s:tsuperregister);
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function addnodup(s:tsuperregister): boolean;
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function get:tsuperregister;
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function readidx(i:word):tsuperregister;
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procedure deleteidx(i:word);
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function delete(s:tsuperregister):boolean;
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end;
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psuperregisterworklist=^tsuperregisterworklist;
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const
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{ alias for easier understanding }
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R_SSEREGISTER = R_MMREGISTER;
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{ Invalid register number }
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RS_INVALID = high(tsuperregister);
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NR_INVALID = tregister($ffffffff);
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tcgsize2size : Array[tcgsize] of integer =
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(0,
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{ integer values }
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1, 2, 4, 8, 16,
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1, 2, 4, 8, 16,
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{ floating point values }
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4, 8, 10, 8, 16,
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{ multimedia values }
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1, 2, 4, 8, 16, 32, 64);
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tfloat2tcgsize: array[tfloattype] of tcgsize =
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(OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
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tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
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(s32real,s64real,s80real,s64comp);
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tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
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LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
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{$if defined(cpu64bitalu)}
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{ operand size describing an unsigned value in a pair of int registers }
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OS_PAIR = OS_128;
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{ operand size describing an signed value in a pair of int registers }
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OS_SPAIR = OS_S128;
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{$elseif defined(cpu32bitalu)}
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{ operand size describing an unsigned value in a pair of int registers }
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OS_PAIR = OS_64;
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{ operand size describing an signed value in a pair of int registers }
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OS_SPAIR = OS_S64;
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{$elseif defined(cpu16bitalu)}
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{ operand size describing an unsigned value in a pair of int registers }
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OS_PAIR = OS_32;
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{ operand size describing an signed value in a pair of int registers }
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OS_SPAIR = OS_S32;
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{$elseif defined(cpu8bitalu)}
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{ operand size describing an unsigned value in a pair of int registers }
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OS_PAIR = OS_16;
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{ operand size describing an signed value in a pair of int registers }
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OS_SPAIR = OS_S16;
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{$endif}
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{ Table to convert tcgsize variables to the correspondending
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unsigned types }
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tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
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OS_8, OS_16, OS_32, OS_64, OS_128,
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OS_8, OS_16, OS_32, OS_64, OS_128,
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OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
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tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
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OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
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OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
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OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
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OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256,OS_M512);
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tcgloc2str : array[TCGLoc] of string[12] = (
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'LOC_INVALID',
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'LOC_VOID',
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'LOC_CONST',
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'LOC_JUMP',
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'LOC_FLAGS',
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'LOC_REG',
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'LOC_CREG',
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'LOC_FPUREG',
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'LOC_CFPUREG',
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'LOC_MMXREG',
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'LOC_CMMXREG',
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'LOC_MMREG',
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'LOC_CMMREG',
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'LOC_SSETREG',
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'LOC_CSSETREG',
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'LOC_SSETREF',
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'LOC_CSSETREF',
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'LOC_CREF',
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'LOC_REF'
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);
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var
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mms_movescalar : pmmshuffle;
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procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
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maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
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procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
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procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
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function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
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function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
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function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
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function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
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function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
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procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
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procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
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function generic_regname(r:tregister):string;
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{# From a constant numeric value, return the abstract code generator
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size.
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}
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function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
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function int_float_cgsize(const a: tcgint): tcgsize;
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function float_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
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function double_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
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function tcgsize2str(cgsize: tcgsize):string;
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{ return the inverse condition of opcmp }
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function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
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{ return the opcmp needed when swapping the operands }
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function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
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{ return whether op is commutative }
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function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
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{ returns true, if shuffle describes a real shuffle operation and not only a move }
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function realshuffle(shuffle : pmmshuffle) : boolean;
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{ returns true, if the shuffle describes only a move of the scalar at index 0 }
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function shufflescalar(shuffle : pmmshuffle) : boolean;
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{ removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
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the source }
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procedure removeshuffles(var shuffle : tmmshuffle);
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function is_float_cgsize(size: tcgsize): boolean;{$ifdef USEINLINE}inline;{$endif}
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implementation
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uses
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cutils,verbose;
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{******************************************************************************
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tsuperregisterworklist
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******************************************************************************}
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constructor tsuperregisterworklist.init;
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begin
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length:=0;
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buflength:=0;
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buflengthinc:=16;
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buf:=nil;
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end;
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constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
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begin
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self:=x;
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if x.buf<>nil then
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begin
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getmem(buf,buflength*sizeof(Tsuperregister));
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move(x.buf^,buf^,length*sizeof(Tsuperregister));
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end;
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end;
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destructor tsuperregisterworklist.done;
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begin
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if assigned(buf) then
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freemem(buf);
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end;
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|
|
procedure tsuperregisterworklist.add(s:tsuperregister);
|
|
|
|
begin
|
|
inc(length);
|
|
{ Need to increase buffer length? }
|
|
if length>=buflength then
|
|
begin
|
|
inc(buflength,buflengthinc);
|
|
buflengthinc:=buflengthinc*2;
|
|
if buflengthinc>256 then
|
|
buflengthinc:=256;
|
|
reallocmem(buf,buflength*sizeof(Tsuperregister));
|
|
end;
|
|
buf^[length-1]:=s;
|
|
end;
|
|
|
|
|
|
function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
|
|
|
|
begin
|
|
addnodup := false;
|
|
if indexword(buf^,length,s) = -1 then
|
|
begin
|
|
add(s);
|
|
addnodup := true;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure tsuperregisterworklist.clear;
|
|
|
|
begin
|
|
length:=0;
|
|
end;
|
|
|
|
|
|
procedure tsuperregisterworklist.deleteidx(i:word);
|
|
|
|
begin
|
|
if i>=length then
|
|
internalerror(200310144);
|
|
buf^[i]:=buf^[length-1];
|
|
dec(length);
|
|
end;
|
|
|
|
|
|
function tsuperregisterworklist.readidx(i:word):tsuperregister;
|
|
begin
|
|
if (i >= length) then
|
|
internalerror(2005010601);
|
|
result := buf^[i];
|
|
end;
|
|
|
|
|
|
function tsuperregisterworklist.get:tsuperregister;
|
|
|
|
begin
|
|
if length=0 then
|
|
internalerror(200310142);
|
|
get:=buf^[0];
|
|
buf^[0]:=buf^[length-1];
|
|
dec(length);
|
|
end;
|
|
|
|
|
|
function tsuperregisterworklist.delete(s:tsuperregister):boolean;
|
|
|
|
var
|
|
i:longint;
|
|
|
|
begin
|
|
delete:=false;
|
|
{ indexword in 1.0.x and 1.9.4 is broken }
|
|
i:=indexword(buf^,length,s);
|
|
if i<>-1 then
|
|
begin
|
|
deleteidx(i);
|
|
delete := true;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
|
|
maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
|
|
|
|
begin
|
|
fillchar(regs,(maxreg+7) shr 3,-byte(setall));
|
|
end;
|
|
|
|
|
|
procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
include(regs[s shr 8],(s and $ff));
|
|
end;
|
|
|
|
|
|
procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
exclude(regs[s shr 8],(s and $ff));
|
|
end;
|
|
|
|
|
|
function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
result:=(s and $ff) in regs[s shr 8];
|
|
end;
|
|
|
|
|
|
function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
tregisterrec(result).regtype:=rt;
|
|
tregisterrec(result).supreg:=sr;
|
|
tregisterrec(result).subreg:=sb;
|
|
end;
|
|
|
|
|
|
function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
result:=tregisterrec(r).subreg;
|
|
end;
|
|
|
|
|
|
function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
result:=tregisterrec(r).supreg;
|
|
end;
|
|
|
|
|
|
function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
result:=tregisterrec(r).regtype;
|
|
end;
|
|
|
|
|
|
procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
tregisterrec(r).subreg:=sr;
|
|
end;
|
|
|
|
|
|
procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
tregisterrec(r).supreg:=sr;
|
|
end;
|
|
|
|
|
|
function generic_regname(r:tregister):string;
|
|
var
|
|
nr : string[12];
|
|
begin
|
|
str(getsupreg(r),nr);
|
|
case getregtype(r) of
|
|
R_INTREGISTER:
|
|
result:='ireg'+nr;
|
|
R_FPUREGISTER:
|
|
result:='freg'+nr;
|
|
R_MMREGISTER:
|
|
result:='mreg'+nr;
|
|
R_MMXREGISTER:
|
|
result:='xreg'+nr;
|
|
R_ADDRESSREGISTER:
|
|
result:='areg'+nr;
|
|
R_SPECIALREGISTER:
|
|
result:='sreg'+nr;
|
|
else
|
|
begin
|
|
result:='INVALID';
|
|
exit;
|
|
end;
|
|
end;
|
|
case getsubreg(r) of
|
|
R_SUBNONE:
|
|
;
|
|
R_SUBL:
|
|
result:=result+'l';
|
|
R_SUBH:
|
|
result:=result+'h';
|
|
R_SUBW:
|
|
result:=result+'w';
|
|
R_SUBD:
|
|
result:=result+'d';
|
|
R_SUBQ:
|
|
result:=result+'q';
|
|
R_SUBFS:
|
|
result:=result+'fs';
|
|
R_SUBFD:
|
|
result:=result+'fd';
|
|
R_SUBMMD:
|
|
result:=result+'md';
|
|
R_SUBMMS:
|
|
result:=result+'ms';
|
|
R_SUBMMWHOLE:
|
|
result:=result+'ma';
|
|
R_SUBMMX:
|
|
result:=result+'mx';
|
|
R_SUBMMY:
|
|
result:=result+'my';
|
|
R_SUBMMZ:
|
|
result:=result+'mz';
|
|
else
|
|
internalerror(200308252);
|
|
end;
|
|
end;
|
|
|
|
|
|
function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
|
|
const
|
|
size2cgsize : array[0..8] of tcgsize = (
|
|
OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
|
|
);
|
|
begin
|
|
{$ifdef cpu64bitalu}
|
|
if a=16 then
|
|
result:=OS_128
|
|
else
|
|
{$endif cpu64bitalu}
|
|
if a>8 then
|
|
result:=OS_NO
|
|
else
|
|
result:=size2cgsize[a];
|
|
end;
|
|
|
|
|
|
function int_float_cgsize(const a: tcgint): tcgsize;
|
|
begin
|
|
case a of
|
|
4 :
|
|
result:=OS_F32;
|
|
8 :
|
|
result:=OS_F64;
|
|
10 :
|
|
result:=OS_F80;
|
|
16 :
|
|
result:=OS_F128;
|
|
else
|
|
internalerror(200603211);
|
|
end;
|
|
end;
|
|
|
|
|
|
function float_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
case a of
|
|
4:
|
|
result := OS_M32;
|
|
16:
|
|
result := OS_M128;
|
|
32:
|
|
result := OS_M256;
|
|
64:
|
|
result := OS_M512;
|
|
else
|
|
result := int_cgsize(a);
|
|
end;
|
|
end;
|
|
|
|
function double_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
case a of
|
|
8:
|
|
result := OS_M64;
|
|
16:
|
|
result := OS_M128;
|
|
32:
|
|
result := OS_M256;
|
|
64:
|
|
result := OS_M512;
|
|
else
|
|
result := int_cgsize(a);
|
|
end;
|
|
end;
|
|
|
|
|
|
function tcgsize2str(cgsize: tcgsize):string;
|
|
begin
|
|
Str(cgsize, Result);
|
|
end;
|
|
|
|
|
|
function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
|
|
const
|
|
list: array[TOpCmp] of TOpCmp =
|
|
(OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
|
|
OC_B,OC_BE);
|
|
begin
|
|
inverse_opcmp := list[opcmp];
|
|
end;
|
|
|
|
|
|
function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
|
|
const
|
|
list: array[TOpCmp] of TOpCmp =
|
|
(OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
|
|
OC_BE,OC_B);
|
|
begin
|
|
swap_opcmp := list[opcmp];
|
|
end;
|
|
|
|
|
|
function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
|
|
const
|
|
list: array[topcg] of boolean =
|
|
(true,false,true,true,false,false,true,true,false,false,
|
|
true,false,false,false,false,true,false,false);
|
|
begin
|
|
commutativeop := list[op];
|
|
end;
|
|
|
|
|
|
function realshuffle(shuffle : pmmshuffle) : boolean;
|
|
var
|
|
i : longint;
|
|
begin
|
|
realshuffle:=true;
|
|
if (shuffle=nil) or (shuffle^.len=0) then
|
|
realshuffle:=false
|
|
else
|
|
begin
|
|
for i:=1 to shuffle^.len do
|
|
begin
|
|
if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
|
|
exit;
|
|
end;
|
|
realshuffle:=false;
|
|
end;
|
|
end;
|
|
|
|
|
|
function shufflescalar(shuffle : pmmshuffle) : boolean;
|
|
begin
|
|
result:=shuffle^.len=0;
|
|
end;
|
|
|
|
|
|
procedure removeshuffles(var shuffle : tmmshuffle);
|
|
var
|
|
i : longint;
|
|
begin
|
|
if shuffle.len=0 then
|
|
exit;
|
|
for i:=1 to shuffle.len do
|
|
shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
|
|
end;
|
|
|
|
|
|
function is_float_cgsize(size: tcgsize): boolean;{$ifdef USEINLINE}inline;{$endif}
|
|
begin
|
|
result:=size in [OS_F32..OS_F128];
|
|
end;
|
|
|
|
|
|
procedure Initmms(var p : pmmshuffle;len : ShortInt);
|
|
var
|
|
i : Integer;
|
|
begin
|
|
Getmem(p,sizeof(tmmshuffle)+(max(len,0)-1)*2);
|
|
p^.len:=len;
|
|
for i:=1 to len do
|
|
{$push}
|
|
{$R-}
|
|
p^.shuffles[i]:=i;
|
|
{$pop}
|
|
end;
|
|
|
|
initialization
|
|
new(mms_movescalar);
|
|
mms_movescalar^.len:=0;
|
|
finalization
|
|
dispose(mms_movescalar);
|
|
end.
|