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4686f61002
so that they can still be freed after the reference has been changed
(e.g. in case of array indexing or record field accesses) (mantis #33628)
git-svn-id: trunk@38814 -
237 lines
8.0 KiB
ObjectPascal
237 lines
8.0 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl
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This unit implements the SPARC specific class for the register
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allocator
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************}
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unit rgcpu;
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{$i fpcdefs.inc}
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interface
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uses
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aasmbase,aasmcpu,aasmtai,aasmsym,aasmdata,
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cgbase,cgutils,
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cpubase,
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rgobj;
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type
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trgcpu=class(trgobj)
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procedure add_constraints(reg:tregister);override;
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function get_spill_subreg(r : tregister) : tsubregister;override;
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procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override;
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procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override;
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function do_spill_replace(list:TAsmList;instr:tai_cpu_abstract_sym;orgreg:tsuperregister;const spilltemp:treference):boolean; override;
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end;
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implementation
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uses
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verbose,cutils,
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globtype,
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cgobj;
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procedure trgcpu.add_constraints(reg:tregister);
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var
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supreg,i : Tsuperregister;
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begin
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case getsubreg(reg) of
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{ Let 64bit floats conflict with all odd float regs }
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R_SUBFD:
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begin
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supreg:=getsupreg(reg);
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i:=RS_F1;
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while (i<=RS_F31) do
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begin
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add_edge(supreg,i);
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inc(i,2);
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end;
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end;
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{ Let 64bit ints conflict with all odd int regs }
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R_SUBQ:
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begin
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supreg:=getsupreg(reg);
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i:=RS_G1;
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while (i<=RS_I7) do
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begin
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add_edge(supreg,i);
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inc(i,2);
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end;
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end;
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end;
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end;
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function trgcpu.get_spill_subreg(r : tregister) : tsubregister;
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begin
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if getregtype(r)=R_FPUREGISTER then
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result:=getsubreg(r)
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else
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result:=defaultsub;
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end;
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procedure trgcpu.do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister);
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var
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helpins : tai;
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tmpref : treference;
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helplist : TAsmList;
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hreg : tregister;
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begin
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if abs(spilltemp.offset)>4095 then
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begin
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helplist:=TAsmList.create;
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if getregtype(tempreg)=R_INTREGISTER then
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hreg:=tempreg
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else
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hreg:=cg.getintregister(helplist,OS_ADDR);
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{$ifdef SPARC}
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reference_reset(tmpref,sizeof(pint),[]);
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tmpref.offset:=spilltemp.offset;
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tmpref.refaddr:=addr_high;
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helplist.concat(taicpu.op_ref_reg(A_SETHI,tmpref,hreg));
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tmpref.refaddr:=addr_low;
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helplist.concat(taicpu.op_reg_ref_reg(A_OR,hreg,tmpref,hreg));
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{$else SPARC}
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if (spilltemp.offset>=-4294967296) and (spilltemp.offset<=-1) then
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begin
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helplist.concat(taicpu.op_const_reg(A_SETHI,(not(aint(spilltemp.offset)) shr 10) and $3fffff,hreg));
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if (aint(spilltemp.offset) and aint($3ff)) or aint($1c00)<>0 then
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helplist.concat(taicpu.op_reg_const_reg(A_XOR,hreg,(aint(spilltemp.offset) and aint($3ff)) or aint($1c00),hreg));
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end
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else
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Internalerror(2017090901);
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{$endif SPARC}
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reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
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tmpref.index:=spilltemp.base;
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helpins:=spilling_create_load(tmpref,tempreg);
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helplist.concat(helpins);
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list.insertlistafter(pos,helplist);
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helplist.free;
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end
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else
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inherited;
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end;
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procedure trgcpu.do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister);
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var
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tmpref : treference;
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helplist : TAsmList;
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hreg : tregister;
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begin
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if abs(spilltemp.offset)>4095 then
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begin
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helplist:=TAsmList.create;
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if getregtype(tempreg)=R_INTREGISTER then
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hreg:=getregisterinline(helplist,[R_SUBWHOLE])
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else
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hreg:=cg.getintregister(helplist,OS_ADDR);
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{$ifdef SPARC}
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reference_reset(tmpref,sizeof(aint),[]);
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tmpref.offset:=spilltemp.offset;
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tmpref.refaddr:=addr_high;
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helplist.concat(taicpu.op_ref_reg(A_SETHI,tmpref,hreg));
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tmpref.refaddr:=addr_low;
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helplist.concat(taicpu.op_reg_ref_reg(A_OR,hreg,tmpref,hreg));
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{$else SPARC}
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if (spilltemp.offset>=-4294967296) and (spilltemp.offset<=-1) then
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begin
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helplist.concat(taicpu.op_const_reg(A_SETHI,(not(aint(spilltemp.offset)) shr 10) and $3fffff,hreg));
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if (aint(spilltemp.offset) and aint($3ff)) or aint($1c00)<>0 then
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helplist.concat(taicpu.op_reg_const_reg(A_XOR,hreg,(aint(spilltemp.offset) and aint($3ff)) or aint($1c00),hreg));
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end
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else
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Internalerror(2017090901);
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{$endif SPARC}
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reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
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tmpref.index:=spilltemp.base;
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helplist.concat(spilling_create_store(tempreg,tmpref));
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if getregtype(tempreg)=R_INTREGISTER then
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ungetregisterinline(helplist,hreg);
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list.insertlistafter(pos,helplist);
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helplist.free;
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end
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else
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inherited;
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end;
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function trgcpu.do_spill_replace(list:TAsmList;instr:tai_cpu_abstract_sym;orgreg:tsuperregister;const spilltemp:treference):boolean;
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var
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opidx: longint;
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begin
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result:=false;
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{ Replace 'mov src,orgreg' with 'st src,spilltemp'
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and 'mov orgreg,dst' with 'ld spilltemp,dst' }
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if (abs(spilltemp.offset)>4095) then
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exit;
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if ((regtype=R_INTREGISTER) and (instr.opcode<>A_MOV)) or
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((regtype=R_FPUREGISTER) and (instr.opcode<>A_FMOVs) and (instr.opcode<>A_FMOVd)) then
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exit;
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{ Ignore mis-encoded stuff like 'mov %something,%y' }
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if (instr.ops<>2) or
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(instr.oper[0]^.typ<>top_reg) or
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(instr.oper[1]^.typ<>top_reg) or
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(getregtype(instr.oper[0]^.reg)<>regtype) or
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(getregtype(instr.oper[1]^.reg)<>regtype) then
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exit;
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opidx:=-1;
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if get_alias(getsupreg(instr.oper[0]^.reg))=orgreg then
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begin
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if (regtype=R_INTREGISTER) then
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instr.opcode:=A_LD_R
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else if (getsubreg(instr.oper[0]^.reg)=R_SUBFS) then
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instr.opcode:=A_LDF
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else
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instr.opcode:=A_LDDF;
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opidx:=0;
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end
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else if get_alias(getsupreg(instr.oper[1]^.reg))=orgreg then
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begin
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if (regtype=R_INTREGISTER) then
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instr.opcode:=A_ST_R
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else if (getsubreg(instr.oper[1]^.reg)=R_SUBFS) then
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instr.opcode:=A_STF
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else
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instr.opcode:=A_STDF;
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opidx:=1;
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end
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else
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InternalError(2013061002);
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instr.oper[opidx]^.typ:=top_ref;
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new(instr.oper[opidx]^.ref);
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instr.oper[opidx]^.ref^:=spilltemp;
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result:=true;
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end;
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end.
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