mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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4686f61002
so that they can still be freed after the reference has been changed
(e.g. in case of array indexing or record field accesses) (mantis #33628)
git-svn-id: trunk@38814 -
211 lines
7.1 KiB
ObjectPascal
211 lines
7.1 KiB
ObjectPascal
{
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Copyright (c) 1998-2009 by Florian Klaempfl and David Zhang
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This unit implements the register allocator for MIPS(EL)
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit rgcpu;
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{$i fpcdefs.inc}
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interface
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uses
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aasmbase,aasmsym,aasmcpu,aasmtai,aasmdata,
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cgbase,cgutils,
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cpubase,
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rgobj;
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type
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trgcpu=class(trgobj)
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function get_spill_subreg(r : tregister) : tsubregister;override;
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procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override;
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procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override;
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function do_spill_replace(list: TAsmList; instr: tai_cpu_abstract_sym; orgreg: tsuperregister; const spilltemp: treference): boolean; override;
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end;
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trgintcpu=class(trgcpu)
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procedure add_cpu_interferences(p:tai);override;
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end;
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implementation
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uses
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globtype,
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verbose,cutils,
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cgobj;
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function trgcpu.get_spill_subreg(r : tregister) : tsubregister;
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begin
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if getregtype(r)=R_FPUREGISTER then
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result:=getsubreg(r)
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else
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result:=defaultsub;
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end;
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procedure trgcpu.do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister);
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var
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helpins : tai;
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tmpref : treference;
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helplist : tasmlist;
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hreg : tregister;
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begin
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if abs(spilltemp.offset)>32767 then
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begin
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helplist:=tasmlist.create;
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if getregtype(tempreg)=R_INTREGISTER then
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hreg:=tempreg
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else
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hreg:=cg.getintregister(helplist,OS_ADDR);
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helplist.concat(taicpu.op_reg_const(A_LUI,hreg,spilltemp.offset shr 16));
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helplist.concat(taicpu.op_reg_reg_const(A_ORI,hreg,hreg,spilltemp.offset and $FFFF));
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helplist.concat(taicpu.op_reg_reg_reg(A_ADDU,hreg,hreg,spilltemp.base));
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reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
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helpins:=spilling_create_load(tmpref,tempreg);
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helplist.concat(helpins);
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list.insertlistafter(pos,helplist);
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helplist.free;
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end
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else
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inherited;
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end;
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procedure trgcpu.do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister);
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var
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tmpref : treference;
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helplist : tasmlist;
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hreg : tregister;
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begin
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if abs(spilltemp.offset)>32767 then
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begin
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helplist:=tasmlist.create;
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if getregtype(tempreg)=R_INTREGISTER then
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hreg:=getregisterinline(helplist,[R_SUBWHOLE])
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else
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hreg:=cg.getintregister(helplist,OS_ADDR);
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helplist.concat(taicpu.op_reg_const(A_LUI,hreg,spilltemp.offset shr 16));
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helplist.concat(taicpu.op_reg_reg_const(A_ORI,hreg,hreg,spilltemp.offset and $FFFF));
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helplist.concat(taicpu.op_reg_reg_reg(A_ADDU,hreg,hreg,spilltemp.base));
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reference_reset_base(tmpref,hreg,0,spilltemp.temppos,sizeof(aint),[]);
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helplist.concat(spilling_create_store(tempreg,tmpref));
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if getregtype(tempreg)=R_INTREGISTER then
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ungetregisterinline(helplist,hreg);
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list.insertlistafter(pos,helplist);
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helplist.free;
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end
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else
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inherited;
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end;
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function trgcpu.do_spill_replace(list: TAsmList; instr: tai_cpu_abstract_sym; orgreg: tsuperregister; const spilltemp: treference): boolean;
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begin
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result:=false;
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{ Replace 'move orgreg,src' with 'sw src,spilltemp'
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and 'move dst,orgreg' with 'lw dst,spilltemp' }
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if (not (instr.opcode in [A_MOVE,A_MOV_S,A_MOV_D,A_MTC1])) or (abs(spilltemp.offset)>32767) then
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exit;
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if (instr.ops<>2) or
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(instr.oper[0]^.typ<>top_reg) or
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(instr.oper[1]^.typ<>top_reg) then
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InternalError(2013061001);
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if (getregtype(instr.oper[0]^.reg)<>regtype) or
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(getregtype(instr.oper[1]^.reg)<>regtype) then
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begin
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if (instr.opcode=A_MTC1) then
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begin
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{ TODO: MTC1 src,orgreg ==> SW src,0/4(spilltemp) (endian-dependent!!) }
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if (regtype=R_FPUREGISTER) then
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exit;
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end
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else
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InternalError(2013061003);
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end;
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if get_alias(getsupreg(instr.oper[1]^.reg))=orgreg then
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begin
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case instr.opcode of
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A_MOVE: instr.opcode:=A_LW;
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A_MOV_S: instr.opcode:=A_LWC1;
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A_MOV_D: instr.opcode:=A_LDC1;
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else
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InternalError(2013061004);
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end;
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end
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else if get_alias(getsupreg(instr.oper[0]^.reg))=orgreg then
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begin
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case instr.opcode of
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A_MOVE: instr.opcode:=A_SW;
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A_MOV_S: instr.opcode:=A_SWC1;
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A_MOV_D: instr.opcode:=A_SDC1;
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A_MTC1:
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begin
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if (getregtype(instr.oper[0]^.reg)<>R_INTREGISTER) then
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InternalError(2013061006);
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instr.opcode:=A_LWC1;
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end
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else
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InternalError(2013061005);
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end;
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instr.oper[0]^:=instr.oper[1]^;
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end
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else
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InternalError(2013061002);
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instr.oper[1]^.typ:=top_ref;
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new(instr.oper[1]^.ref);
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instr.oper[1]^.ref^:=spilltemp;
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result:=true;
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end;
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procedure trgintcpu.add_cpu_interferences(p: tai);
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var
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supreg: tsuperregister;
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begin
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if p.typ<>ait_instruction then
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exit;
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if (taicpu(p).ops>=1) and (taicpu(p).oper[0]^.typ=top_reg) and
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(getregtype(taicpu(p).oper[0]^.reg)=regtype) and
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(taicpu(p).spilling_get_operation_type(0) in [operand_write,operand_readwrite]) then
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begin
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{ prevent merging registers with frame/stack pointer, $zero and $at
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if an instruction writes to the register }
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supreg:=getsupreg(taicpu(p).oper[0]^.reg);
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add_edge(supreg,RS_STACK_POINTER_REG);
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add_edge(supreg,RS_FRAME_POINTER_REG);
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add_edge(supreg,RS_R0);
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add_edge(supreg,RS_R1);
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end;
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end;
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end.
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