fpc/compiler/riscv
Jeppe Johansen 02c3f328a2 - RISC-V: Share optimizations between 32 and 64-bit.
git-svn-id: trunk@43934 -
2020-01-13 22:49:23 +00:00
..
aasmcpu.pas * fix case completeness and unreachable code warnings in compiler that would 2019-05-12 14:29:03 +00:00
agrvgas.pas * increase support for multilib binutils for RISC V by passing the ABI to the assembler 2019-12-25 15:23:21 +00:00
aoptcpurv.pas - RISC-V: Share optimizations between 32 and 64-bit. 2020-01-13 22:49:23 +00:00
cgrv.pas Add explicit smallint typecast to first marameter of SarSmallint call to avoid range check errors 2019-11-29 23:26:45 +00:00
hlcgrv.pas * on Mach-O, PECOFF and ELF platforms, write local symbols as hidden/ 2019-07-07 21:33:43 +00:00
nrvadd.pas Comparison nodes are always in LOC_REGISTER, never in LOC_JUMP for riscv32 or riscv64 CPUs 2019-11-29 23:28:05 +00:00
nrvcnv.pas
nrvcon.pas
nrvinl.pas + software handling of exceptions on arm 2019-07-28 21:06:36 +00:00
nrvset.pas
rarvgas.pas - Add support for .option directive in riscv assembler. 2019-04-14 20:51:29 +00:00
rgcpu.pas Add explicit smallint typecast to first marameter of SarSmallint call to avoid range check errors 2019-11-29 23:26:45 +00:00