| .. | 
		
		
			
			
			
			
				| aasmcpu.pas | Add ORN instruction for Thumb2. | 2018-09-08 12:10:51 +00:00 | 
		
			
			
			
			
				| agarmgas.pas | * pass float abi always to the arm assembler | 2018-10-20 16:48:31 +00:00 | 
		
			
			
			
			
				| aoptcpu.pas | Restricted MlaCmp>Mlas optimization to only work in ARM mode. | 2017-06-26 18:14:46 +00:00 | 
		
			
			
			
			
				| aoptcpub.pas | * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. | 2014-09-22 16:18:16 +00:00 | 
		
			
			
			
			
				| aoptcpud.pas |  |  | 
		
			
			
			
			
				| armatt.inc | Add support for writeback in RFE and SRS instructions. | 2015-12-26 23:53:11 +00:00 | 
		
			
			
			
			
				| armatts.inc | Add support for writeback in RFE and SRS instructions. | 2015-12-26 23:53:11 +00:00 | 
		
			
			
			
			
				| armins.dat | + support for vmov.xx vreg,#imm on arm | 2018-06-24 12:39:59 +00:00 | 
		
			
			
			
			
				| armnop.inc | + support for vmov.xx vreg,#imm on arm | 2018-06-24 12:39:59 +00:00 | 
		
			
			
			
			
				| armop.inc | Add support for writeback in RFE and SRS instructions. | 2015-12-26 23:53:11 +00:00 | 
		
			
			
			
			
				| armreg.dat | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| armtab.inc | + support for vmov.xx vreg,#imm on arm | 2018-06-24 12:39:59 +00:00 | 
		
			
			
			
			
				| cgcpu.pas | * converted Boolean8 to an internal type, and mapped Boolean to the | 2018-10-16 21:14:18 +00:00 | 
		
			
			
			
			
				| cpubase.pas | Fix for bug report #34380 | 2018-10-18 20:21:54 +00:00 | 
		
			
			
			
			
				| cpuelf.pas | arm-netbsd: added platform define and dummy rtl files so the build passes for this platform. port not functional yet | 2018-03-05 15:38:46 +00:00 | 
		
			
			
			
			
				| cpuinfo.pas | + patch by Simon Ameis: adds all the STM32F091* microcontroller units to the list of supported ARM MCUs, resolves issue #32484 | 2017-10-01 18:59:01 +00:00 | 
		
			
			
			
			
				| cpunode.pas | * automatically generate necessary indirect symbols when a new assembler | 2016-07-20 20:53:03 +00:00 | 
		
			
			
			
			
				| cpupara.pas | * replaced the saved_XXX_registers arrays with virtual methods inside | 2018-04-19 21:22:16 +00:00 | 
		
			
			
			
			
				| cpupi.pas | * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can | 2016-12-16 22:41:21 +00:00 | 
		
			
			
			
			
				| cputarg.pas | AROS: added arm-aros target to compiler and fpcmake | 2016-11-06 10:51:45 +00:00 | 
		
			
			
			
			
				| hlcgcpu.pas | * keep track of the temp position separately from the offset in references, | 2018-04-22 17:03:16 +00:00 | 
		
			
			
			
			
				| itcpugas.pas |  |  | 
		
			
			
			
			
				| narmadd.pas | * converted Boolean8 to an internal type, and mapped Boolean to the | 2018-10-16 21:14:18 +00:00 | 
		
			
			
			
			
				| narmcal.pas | syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed | 2016-12-02 09:29:09 +00:00 | 
		
			
			
			
			
				| narmcnv.pas | * tarmtypeconvnode.first_int_to_real should call the generic method in the parent class, if soft fpu code is generated, resolves #31350 | 2017-02-12 16:05:13 +00:00 | 
		
			
			
			
			
				| narmcon.pas | * use vmov.xx to load float constants if possible | 2018-06-24 12:40:00 +00:00 | 
		
			
			
			
			
				| narminl.pas | * keep track of the temp position separately from the offset in references, | 2018-04-22 17:03:16 +00:00 | 
		
			
			
			
			
				| narmmat.pas | * fix currency division on non x86 32 bit targets | 2018-03-17 22:44:44 +00:00 | 
		
			
			
			
			
				| narmmem.pas | * generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe | 2015-02-23 22:56:00 +00:00 | 
		
			
			
			
			
				| narmset.pas | * Removed unused vars. | 2017-05-04 10:38:49 +00:00 | 
		
			
			
			
			
				| pp.lpi.template |  |  | 
		
			
			
			
			
				| raarm.pas |  |  | 
		
			
			
			
			
				| raarmgas.pas | * factored out check to determine whether a variable can be subscripted in | 2018-01-01 14:29:21 +00:00 | 
		
			
			
			
			
				| rarmcon.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rarmdwa.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rarmnor.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rarmnum.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rarmrni.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rarmsri.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rarmsta.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rarmstd.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rarmsup.inc | Added some APSR register bitmask definitions. | 2014-12-12 22:23:44 +00:00 | 
		
			
			
			
			
				| rgcpu.pas | * keep track of the temp position separately from the offset in references, | 2018-04-22 17:03:16 +00:00 | 
		
			
			
			
			
				| symcpu.pas | arm: arm-aros syscall support | 2016-11-06 14:31:42 +00:00 |