florian 03d353c1f5 - cosmetics: superfluous newlines removed ... git-svn-id: trunk@48970 -		2021-03-14 16:41:34 +00:00
..
aoptcpu.pas	- RISC-V: Share optimizations between 32 and 64-bit.	2020-01-13 22:49:23 +00:00
aoptcpub.pas
aoptcpuc.pas
aoptcpud.pas
cgcpu.pas	- cosmetics: superfluous newlines removed	2021-03-14 16:41:34 +00:00
cpubase.pas	Rough fix for riscv32 failure	2021-03-14 09:10:29 +00:00
cpuinfo.pas	* disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does	2020-01-29 22:21:07 +00:00
cpunode.pas
cpupara.pas	* RiscV32: corrected tcpuparamanager.getcgtempparaloc, resolves #37709	2020-09-08 20:30:59 +00:00
cpupi.pas
cputarg.pas	* unified RiscV32 and RiscV64 GAS readers	2021-03-07 08:53:03 +00:00
hlcgcpu.pas
nrv32add.pas
nrv32cal.pas
nrv32cnv.pas
nrv32mat.pas	* RiscV32 correctly set operands of div/mod operations, resolves #37743	2020-09-12 21:32:11 +00:00
rrv32con.inc
rrv32dwa.inc
rrv32nor.inc
rrv32num.inc
rrv32rni.inc
rrv32sri.inc
rrv32sta.inc
rrv32std.inc
rrv32sup.inc
rv32reg.dat
symcpu.pas
tripletcpu.pas	* mark all external assemblers using an LLVM tool using af_llvm	2020-07-19 14:30:35 +00:00