nickysn 599b7e80c0 * fix for OP_ROR in tcgavr.a_op_reg_reg_internal ... git-svn-id: trunk@44749 -		2020-04-17 17:19:22 +00:00
..
aasmcpu.pas	* remove accidently committed debug code	2020-02-14 20:59:32 +00:00
agavrgas.pas
aoptcpu.pas	* based on a patch by Christo Crause: more compiler fixes for avrtiny, resolves #36646	2020-02-02 20:35:29 +00:00
aoptcpub.pas	- get rid of MaxOps, it is redundant with max_operands	2018-11-02 21:32:29 +00:00
aoptcpud.pas
avrreg.dat
ccpuinnr.inc	* compilation fixed	2020-01-19 15:55:20 +00:00
cgcpu.pas	* fix for OP_ROR in tcgavr.a_op_reg_reg_internal	2020-04-17 17:19:22 +00:00
cpubase.pas	+ AVR: GetDefaultZeroReg and GetDefaultTmpReg	2020-01-19 15:55:23 +00:00
cpuinfo.pas	* patch by Christo Crause: more avr1 controllers and remove attiny28 from avr25 makefile list, resolves #36686	2020-02-09 10:51:14 +00:00
cpunode.pas
cpupara.pas	* AVR: couple of fixes for CPUs with only 16 registers	2020-02-14 21:27:43 +00:00
cpupi.pas	* AVR: decide after compiler if a certain subroutine is suitable for avr1, if not, replace it by sleep and warn	2020-02-08 22:05:21 +00:00
cputarg.pas
hlcgcpu.pas	* changed create_hlcodegen into a procvar, so that we don't have to insert	2018-11-29 21:31:15 +00:00
itcpugas.pas
navradd.pas	+ AVR: GetDefaultZeroReg and GetDefaultTmpReg	2020-01-19 15:55:23 +00:00
navrcnv.pas
navrinl.pas	AVR: Add optimizations for sign testing, and a better Abs() implementation.	2019-07-28 11:16:37 +00:00
navrmat.pas	* AVR: use CP ...,r1 instead of CPI ...,0 to enable all registers being used as first operand	2020-01-20 21:14:28 +00:00
navrmem.pas
navrutil.pas
raavr.pas	* max_operands needs only to be 2 on avr	2018-11-03 10:39:58 +00:00
raavrgas.pas
ravrcon.inc
ravrdwa.inc
ravrnor.inc
ravrnum.inc
ravrrni.inc
ravrsri.inc
ravrsta.inc
ravrstd.inc
ravrsup.inc
rgcpu.pas	+ AVR: initial support for the avrtiny architecture	2020-01-19 15:55:24 +00:00
symcpu.pas