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05b919b821
initialisation in addition to what tcg already supports) git-svn-id: branches/jvmbackend@18305 -
100 lines
2.8 KiB
ObjectPascal
100 lines
2.8 KiB
ObjectPascal
{
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Copyright (c) 2010 by Jonas Maebe
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This unit implements the code generator for the Java VM
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cgcpu;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,parabase,
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cgbase,cgutils,cgobj,
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aasmbase,aasmtai,aasmdata,aasmcpu,
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cpubase,cpuinfo,
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node,symconst,SymType,symdef,
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rgcpu;
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type
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TCgJvm=class(tcg)
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public
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procedure init_register_allocators;override;
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procedure done_register_allocators;override;
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function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;override;
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end;
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procedure create_codegen;
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implementation
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uses
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globals,verbose,systems,cutils,
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paramgr,fmodule,
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tgobj,
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procinfo,cpupi;
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{****************************************************************************
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Assembler code
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****************************************************************************}
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procedure tcgjvm.init_register_allocators;
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begin
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inherited init_register_allocators;
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{$ifndef cpu64bitaddr}
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rg[R_INTREGISTER]:=Trgcpu.create(R_INTREGISTER,R_SUBD,
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[RS_R0],first_int_imreg,[]);
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{$else not cpu64bitaddr}
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rg[R_INTREGISTER]:=Trgcpu.create(R_INTREGISTER,R_SUBQ,
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[RS_R0],first_int_imreg,[]);
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{$endif not cpu64bitaddr}
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rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBFD,
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[RS_R0],first_fpu_imreg,[]);
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rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBNONE,
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[RS_R0],first_mm_imreg,[]);
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end;
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procedure tcgjvm.done_register_allocators;
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begin
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rg[R_INTREGISTER].free;
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rg[R_FPUREGISTER].free;
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rg[R_MMREGISTER].free;
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inherited done_register_allocators;
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end;
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function tcgjvm.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
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begin
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if size=OS_F64 then
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result:=rg[R_FPUREGISTER].getregister(list,R_SUBFD)
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else
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result:=rg[R_FPUREGISTER].getregister(list,R_SUBFS);
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end;
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procedure create_codegen;
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begin
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cg:=tcgjvm.Create;
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end;
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end.
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