tg74 31e4d4ef5e AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512 ... git-svn-id: branches/tg74/avx512@39196 -		2018-06-08 06:53:35 +00:00
..
aoptcpu.pas	* enable Lea2AddBase and Lea2AddIndex in TX86AsmOptimizer.PostPeepholeOptLea as we have flag tracking now	2018-03-11 20:30:09 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	* keep track of the temp position separately from the offset in references,	2018-04-22 17:03:16 +00:00
cpubase.inc	* replaced the saved_XXX_registers arrays with virtual methods inside	2018-04-19 21:22:16 +00:00
cpuelf.pas
cpuinfo.pas	+ implementation of the vectorcall calling convention by J. Gareth Moreton	2018-02-11 17:50:37 +00:00
cpunode.pas
cpupara.pas	* replaced the saved_XXX_registers arrays with virtual methods inside	2018-04-19 21:22:16 +00:00
cpupi.pas	* patch by J. Gareth Moreton to fix vectorcall (no effect) for linux,	2018-04-02 21:14:26 +00:00
cputarg.pas
hlcgcpu.pas	* keep track of the temp position separately from the offset in references,	2018-04-22 17:03:16 +00:00
nx64add.pas
nx64cal.pas
nx64cnv.pas
nx64flw.pas
nx64inl.pas
nx64mat.pas	+ support mmx shifting	2018-02-27 21:40:12 +00:00
nx64set.pas	* keep track of the temp position separately from the offset in references,	2018-04-22 17:03:16 +00:00
r8664ari.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664att.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664con.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664dwrf.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664int.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664iri.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664nasm.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664nor.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664num.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664ot.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664rni.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664sri.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664stab.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
r8664std.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
rax64att.pas
rax64int.pas	+ (slightly) patch by Emelyanov Roman to add support of SEH directive in FPC internal assembler with INTEL syntax, resolves #29894	2018-02-24 16:14:08 +00:00
rgcpu.pas
symcpu.pas
win64unw.pas
x8664ats.inc	* vcmppd hardcoded primitives like vcmpeqpd.	2018-03-03 23:32:54 +00:00
x8664att.inc	* vcmppd hardcoded primitives like vcmpeqpd.	2018-03-03 23:32:54 +00:00
x8664int.inc	* vcmppd hardcoded primitives like vcmpeqpd.	2018-03-03 23:32:54 +00:00
x8664nop.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00
x8664op.inc	* vcmppd hardcoded primitives like vcmpeqpd.	2018-03-03 23:32:54 +00:00
x8664pro.inc	* vcmppd hardcoded primitives like vcmpeqpd.	2018-03-03 23:32:54 +00:00
x8664tab.inc	AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512	2018-06-08 06:53:35 +00:00