nickysn 328d546155 + extend the i8086 peephole optimization that converts certain sequences to lds ... and les instructions to also support the lss, lfs and lgs instructions on i386 (won't be generated by the current code generator, but might become useful in the future, if we start using the fs and gs segment registers as well) git-svn-id: trunk@35858 -		2017-04-20 13:00:26 +00:00
..
aoptcpu.pas	+ extend the i8086 peephole optimization that converts certain sequences to lds	2017-04-20 13:00:26 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	+ added flags register tracking for many i8086 operations	2017-04-19 13:46:20 +00:00
cpubase.inc	+ initial code in aoptcpu for i8086: make use of lds/les	2015-09-27 20:50:57 +00:00
cpuinfo.pas	+ added 486 to the list of supported CPUs on the i8086 and i386 targets	2016-03-23 15:07:56 +00:00
cpunode.pas	* automatically generate necessary indirect symbols when a new assembler	2016-07-20 20:53:03 +00:00
cpupara.pas	* support marking defs created via the getreusable*() class methods as	2015-11-04 20:46:18 +00:00
cpupi.pas	* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can	2016-12-16 22:41:21 +00:00
cputarg.pas	+ added an i8086-embedded target support to the compiler (RTL and makefile	2016-06-17 19:15:24 +00:00
hlcgcpu.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
i8086att.inc	+ support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933	2016-11-18 20:19:39 +00:00
i8086atts.inc	* x86 AT&T reader and writer: cleaned up usage of attsufMM suffix:	2016-11-21 02:07:13 +00:00
i8086int.inc	+ support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933	2016-11-18 20:19:39 +00:00
i8086nop.inc	* Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code.	2016-11-21 13:59:44 +00:00
i8086op.inc	+ support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933	2016-11-18 20:19:39 +00:00
i8086prop.inc	+ added the Ch_RDirFlag change attribute to the STOSx instructions (previously	2017-04-19 20:23:24 +00:00
i8086tab.inc	* Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code.	2016-11-21 13:59:44 +00:00
n8086add.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
n8086cal.pas
n8086cnv.pas	* optimizations for ofs() on i8086 to load only the offset (in a temporary	2015-10-30 21:27:35 +00:00
n8086con.pas	+ show the full segment:offset value of far and huge pointer const nodes in the node tree generated by -vp	2015-10-21 16:53:41 +00:00
n8086inl.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
n8086ld.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
n8086mat.pas	* generate better i8086 code for 64-bit shl/shr, by masking the shift count by 63	2017-04-04 17:58:00 +00:00
n8086mem.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
n8086tcon.pas	+ added support for word/smallint typed constants, initialized with ofs() on i8086	2015-11-11 15:01:08 +00:00
n8086util.pas	* specify the def of assembler level symbols defined via	2016-07-20 20:52:59 +00:00
r8086ari.inc
r8086att.inc
r8086con.inc
r8086dwrf.inc
r8086int.inc
r8086iri.inc
r8086nasm.inc
r8086nor.inc
r8086nri.inc
r8086num.inc
r8086ot.inc
r8086rni.inc
r8086sri.inc
r8086stab.inc
r8086std.inc
ra8086att.pas
ra8086int.pas
rgcpu.pas
symcpu.pas	+ added an unsigned counterpart to tpointerdef.pointer_arithmetic_it_type (needed by inc/dec)	2016-10-08 11:45:24 +00:00
tgcpu.pas	* changed all alignment parameters in the temp manager to shortint	2014-08-19 20:22:45 +00:00