florian 1266491085 o refactored some peephole optimizer code: ... * updated TAOptObj.RegUsedAfterInstruction with the arm implementation and removed the arm specific implementation * RegLoadedWithNewValue and InstructionLoadsFromReg are now a methods of TAoptBase * moved RegEndOfLife to TAOptObj * during this refactoring, fixed also TCpuAsmOptimizer.RegLoadedWithNewValue for arm regarding post/preindexed memory references: those modify the register but do not load it with a new value in the sense of RegLoadedWithNewValue git-svn-id: trunk@33000 -		2016-01-24 15:25:16 +00:00
..
aasmcpu.pas	* fixed sparc compilation after addr_lo/hi changes	2007-07-20 12:30:16 +00:00
aoptcpu.pas	o refactored some peephole optimizer code:	2016-01-24 15:25:16 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	+ added tasmlist parameter to getintparaloc() (needed for llvm)	2015-04-04 14:29:16 +00:00
cpubase.pas
cpuelf.pas	Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen).	2014-12-14 16:28:35 +00:00
cpugas.pas	* store a pointer to the used tasminfo record in every assembler writer, so	2015-09-12 23:32:13 +00:00
cpuinfo.pas	Moved tcontrollerdatatype out into cpuinfo.	2015-09-07 20:36:54 +00:00
cpunode.pas	+ support overriding tdef/tsym methods with target-specific functionality:	2014-03-29 22:31:55 +00:00
cpupara.pas	* support marking defs created via the getreusable*() class methods as	2015-11-04 20:46:18 +00:00
cpupi.pas
cputarg.pas	Add possibility to test sparc elf generator with -dTEST_AGSPARC_ELF	2012-08-23 12:59:45 +00:00
hlcgcpu.pas	* moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because	2014-08-19 20:22:54 +00:00
itcpugas.pas	* log and id tags removed	2005-05-21 09:42:41 +00:00
ncpuadd.pas	* fix GetResFlags DFA optimizer warning on Sparc and AVR too	2014-08-20 13:52:28 +00:00
ncpucall.pas
ncpucnv.pas	* replaced current_procinfo.currtrue/falselabel with storing the true/false	2015-08-27 18:28:57 +00:00
ncpuinln.pas
ncpumat.pas
ncpuset.pas	* MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets).	2014-03-10 23:02:05 +00:00
opcode.inc
racpu.pas
racpugas.pas
rgcpu.pas
rspcon.inc	Reenabled D0-D30 registers	2012-03-30 15:54:05 +00:00
rspdwrf.inc
rspnor.inc
rspnum.inc
rsprni.inc	Reenabled D0-D30 registers	2012-03-30 15:54:05 +00:00
rspsri.inc
rspstab.inc
rspstd.inc
rspsup.inc
spreg.dat
strinst.inc	+ SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently.	2013-12-21 16:27:24 +00:00
symcpu.pas	o fixes handling of iso i/o parameters/program parameters:	2015-05-01 20:58:31 +00:00