fpc/compiler/avr
florian 3cb2cff444 * patch by Christo Crause: more AVR controllers, resolves #36683
git-svn-id: trunk@44130 -
(cherry picked from commit 04ad607bb4)

# Conflicts:
#	.gitattributes
2021-10-24 12:40:37 +02:00
..
aasmcpu.pas * based on a patch by Christo Crause: more compiler fixes for avrtiny, resolves #36646 2021-10-24 12:40:37 +02:00
agavrgas.pas * LDD/STD need always an offset, resolves #33086 2018-01-28 21:06:13 +00:00
aoptcpu.pas * based on a patch by Christo Crause: more compiler fixes for avrtiny, resolves #36646 2021-10-24 12:40:37 +02:00
aoptcpub.pas
aoptcpud.pas
avrreg.dat * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ccpuinnr.inc - Adds intrinsics to save/restore SREG when disabling interrupts. 2021-10-24 12:40:36 +02:00
cgcpu.pas * actually, with lds/sts avrtiny can load addresses up to 191 2021-10-24 12:40:37 +02:00
cpubase.pas + AVR: GetDefaultZeroReg and GetDefaultTmpReg 2021-10-24 12:40:37 +02:00
cpuinfo.pas * patch by Christo Crause: more AVR controllers, resolves #36683 2021-10-24 12:40:37 +02:00
cpunode.pas + implemented some AVR specific intrinsics 2017-11-01 16:33:34 +00:00
cpupara.pas + AVR: initial support for the avrtiny architecture 2021-10-24 12:40:37 +02:00
cpupi.pas
cputarg.pas
hlcgcpu.pas
itcpugas.pas
navradd.pas + AVR: GetDefaultZeroReg and GetDefaultTmpReg 2021-10-24 12:40:37 +02:00
navrcnv.pas
navrinl.pas AVR: Add optimizations for sign testing, and a better Abs() implementation. 2021-10-24 12:40:36 +02:00
navrmat.pas * AVR: use CP ...,r1 instead of CPI ...,0 to enable all registers being used as first operand 2021-10-24 12:40:37 +02:00
navrmem.pas * use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler) 2017-07-28 15:54:03 +00:00
navrutil.pas
raavr.pas * max_operands needs only to be 2 on avr 2021-10-24 12:40:36 +02:00
raavrgas.pas * keep track of the temp position separately from the offset in references, 2018-04-22 17:03:16 +00:00
ravrcon.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrdwa.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrnor.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrnum.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrrni.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsri.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsta.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrstd.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsup.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
rgcpu.pas + AVR: initial support for the avrtiny architecture 2021-10-24 12:40:37 +02:00
symcpu.pas
tripletcpu.pas * merged macOS/AArch64 support + revisions these changes depended on 2020-09-15 19:40:36 +00:00