Jeppe Johansen 0251263234 Move some of the local reloc calculation out of aasmcpu, and into COFF and ELF writers. ... git-svn-id: trunk@32867 -		2016-01-06 23:15:08 +00:00
..
aasmcpu.pas	Move some of the local reloc calculation out of aasmcpu, and into COFF and ELF writers.	2016-01-06 23:15:08 +00:00
agarmgas.pas	Add support for writeback in RFE and SRS instructions.	2015-12-26 23:53:11 +00:00
aoptcpu.pas	Fix minor bug in peephole optimizer.	2015-12-26 23:51:08 +00:00
aoptcpub.pas	* ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions.	2014-09-22 16:18:16 +00:00
aoptcpuc.pas
aoptcpud.pas
armatt.inc	Add support for writeback in RFE and SRS instructions.	2015-12-26 23:53:11 +00:00
armatts.inc	Add support for writeback in RFE and SRS instructions.	2015-12-26 23:53:11 +00:00
armins.dat	Add support for writeback in RFE and SRS instructions.	2015-12-26 23:53:11 +00:00
armnop.inc	Add most pre-UAL VFP instruction forms.	2015-03-14 14:59:13 +00:00
armop.inc	Add support for writeback in RFE and SRS instructions.	2015-12-26 23:53:11 +00:00
armreg.dat	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
armtab.inc	Add most pre-UAL VFP instruction forms.	2015-03-14 14:59:13 +00:00
cgcpu.pas	* do not generate blx instructions, the generation of blx instead of bl was introduced some years ago but today it proves to be wrong: if necessary, the linker converts the bl into a blx, this is also how gcc and clang handle it	2015-12-29 13:32:21 +00:00
cpubase.pas	Fix issue in is_thumb32_imm. imm<11:10> have to be non-zero meaning the rotate only works from 8 to 31. Caused 0x8000001F to be mistaken for a valid immediate.	2015-03-21 12:46:45 +00:00
cpuelf.pas	Make relocation type more precise compared to output of gas.	2016-01-05 07:23:20 +00:00
cpuinfo.pas	Added a bunch of new and fixed embedded controller units. From Michael Ring.	2015-11-21 10:30:49 +00:00
cpunode.pas
cpupara.pas	* support marking defs created via the getreusable*() class methods as	2015-11-04 20:46:18 +00:00
cpupi.pas	* ARM: Do not use R9 as a fixed GOT register.	2015-09-16 13:52:15 +00:00
cputarg.pas
hlcgcpu.pas	* Removed lot of unused vars.	2015-09-17 12:48:58 +00:00
itcpugas.pas
narmadd.pas	Add missing prefix for VCMP for FPv4_S16.	2015-09-06 20:34:08 +00:00
narmcal.pas
narmcnv.pas	* replaced current_procinfo.currtrue/falselabel with storing the true/false	2015-08-27 18:28:57 +00:00
narmcon.pas
narminl.pas	* Removed lot of unused vars.	2015-09-17 12:48:58 +00:00
narmmat.pas	* Removed lot of unused vars.	2015-09-17 12:48:58 +00:00
narmmem.pas	* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe	2015-02-23 22:56:00 +00:00
narmset.pas	* converted register_maybe_adjust_setbase() to the high level code generator	2015-12-05 18:03:37 +00:00
pp.lpi.template
raarm.pas
raarmgas.pas	+ support for the .code directive in arm inline assembler	2016-01-03 22:08:25 +00:00
rarmcon.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmdwa.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmnor.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmnum.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmrni.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmsri.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmsta.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmstd.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmsup.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rgcpu.pas	* Removed lot of unused vars.	2015-09-17 12:48:58 +00:00
symcpu.pas	o fixes handling of iso i/o parameters/program parameters:	2015-05-01 20:58:31 +00:00