paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-12-04 05:21:34 +01:00
Code Issues Packages Projects Releases Wiki Activity
41fba0c4f7
fpc/compiler/aarch64
History
Jonas Maebe 41fba0c4f7 * switched to using the stack pointer as base register for the temp allocator 
instead of the frame pointer register:
      1) we exactly know the offsets of the temps from the stack pointer
         after pass 1 (based on the require parameter stack size for called
         routines), while we don't know it for the frame pointer (it depends
         on the number of saved registers)
      2) temp offsets from the stack pointer are positive while those from
         the frame pointer are negative, and we can directly encode much
         bigger positive offsets in the instructions
   o move the stack pointer register to a virtual register in
     loadparentfpn, because many instructions cannot directly operate
     on/with the stack pointer
   o add the necessary register interference edges for the stack pointer
     register

git-svn-id: trunk@29938 -
2015-02-23 22:54:03 +00:00
..
a64att.inc * added some missing instructions and aliases, reordered them according 2015-02-23 22:48:24 +00:00
a64atts.inc * added some missing instructions and aliases, reordered them according 2015-02-23 22:48:24 +00:00
a64ins.dat * added some missing instructions and aliases, reordered them according 2015-02-23 22:48:24 +00:00
a64nop.inc + instruction table generator for arm64 2012-11-01 16:11:19 +00:00
a64op.inc * added some missing instructions and aliases, reordered them according 2015-02-23 22:48:24 +00:00
a64reg.dat + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
a64tab.inc + instruction table generator for arm64 2012-11-01 16:11:19 +00:00
aasmcpu.pas + support for @page and @pageoffs addressing on AArch64: these are PIC 2015-02-23 22:53:43 +00:00
agcpugas.pas * fixed writing extended registers in references 2015-02-23 22:53:47 +00:00
aoptcpu.pas + assembler optimizer unit skeleton 2012-11-01 20:09:12 +00:00
aoptcpub.pas * completed TAoptBaseCpu.RegModifiedByInstruction() 2015-02-23 22:53:23 +00:00
aoptcpud.pas + assembler optimizer unit skeleton 2012-11-01 20:09:12 +00:00
cgcpu.pas * switched to using the stack pointer as base register for the temp allocator 2015-02-23 22:54:03 +00:00
cpubase.pas * fixed std_param_align 2015-02-23 22:52:55 +00:00
cpuinfo.pas + change always floating point divisions into multiplications if they are a power of two, 2014-11-16 20:47:38 +00:00
cpunode.pas * switched to using the stack pointer as base register for the temp allocator 2015-02-23 22:54:03 +00:00
cpupara.pas * switched to using the stack pointer as base register for the temp allocator 2015-02-23 22:54:03 +00:00
cpupi.pas * switched to using the stack pointer as base register for the temp allocator 2015-02-23 22:54:03 +00:00
cputarg.pas + AArch64 cputarg 2015-02-23 22:52:39 +00:00
hlcgcpu.pas + dummy AArch64 hlcgcpu 2015-02-23 22:52:14 +00:00
itcpugas.pas + ARM64 GAS instruction table unit 2012-11-01 20:09:47 +00:00
ncpuadd.pas + initial implementation of aarch64 add nodes 2015-02-23 22:50:07 +00:00
ncpucnv.pas + initial implementation of aarch64 type conversion nodes 2015-02-23 22:50:10 +00:00
ncpuinl.pas * switched to using the stack pointer as base register for the temp allocator 2015-02-23 22:54:03 +00:00
ncpumat.pas + aarch64 math nodes implementation 2015-02-23 22:50:13 +00:00
ncpumem.pas * switched to using the stack pointer as base register for the temp allocator 2015-02-23 22:54:03 +00:00
ra64con.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
ra64dwa.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
ra64nor.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
ra64num.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
ra64rni.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
ra64sri.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
ra64sta.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
ra64std.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
ra64sup.inc + FPCR, FPSR and TPIDR registers 2015-02-23 22:50:44 +00:00
racpu.pas + Aarch64 assembler reader 2015-02-23 22:52:36 +00:00
racpugas.pas + support for @page and @pageoffs addressing on AArch64: these are PIC 2015-02-23 22:53:43 +00:00
rgcpu.pas * switched to using the stack pointer as base register for the temp allocator 2015-02-23 22:54:03 +00:00
symcpu.pas Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 2014-04-11 14:30:59 +00:00