Jeppe Johansen a1a17447ff - Fix bug in 64bit softfloat double negation. ... - Clean up handling of CPU/FPU type handling in RISCV. - Do more fixes to get RISCV32 working. - Fix most soft multiplication handling for generic RISCV code. Still missing a few. - Add RISCV embedded targets. git-svn-id: trunk@42335 -		2019-07-07 11:32:27 +00:00
..
aoptcpu.pas	* fix case completeness and unreachable code warnings in compiler that would	2019-05-12 14:29:03 +00:00
aoptcpub.pas	- get rid of MaxOps, it is redundant with max_operands	2018-11-02 21:32:29 +00:00
aoptcpuc.pas
aoptcpud.pas
cgcpu.pas	* fix case completeness and unreachable code warnings in compiler that would	2019-05-12 14:29:03 +00:00
cpubase.pas	* synchronised with trunk till r42049	2019-05-12 18:44:05 +00:00
cpuinfo.pas	- Fix bug in 64bit softfloat double negation.	2019-07-07 11:32:27 +00:00
cpunode.pas
cpupara.pas	* fix case completeness and unreachable code warnings in compiler that would	2019-05-12 14:29:03 +00:00
cpupi.pas	* fix case completeness and unreachable code warnings in compiler that would	2019-05-12 14:29:03 +00:00
cputarg.pas
hlcgcpu.pas	Fix compilation with -dEXTDEBUG	2018-10-13 11:34:53 +00:00
itcpugas.pas
nrv64add.pas
nrv64cal.pas
nrv64cnv.pas	* fix int to real for non-register locations	2018-07-22 20:48:15 +00:00
nrv64ld.pas
nrv64mat.pas
rarv64gas.pas	* fix case completeness and unreachable code warnings in compiler that would	2019-05-12 14:29:03 +00:00
rarv.pas	Write real atomic operations, and add memory barrier operations.	2018-07-29 16:43:09 +00:00
rrv32con.inc
rrv32dwa.inc
rrv32nor.inc
rrv32num.inc
rrv32rni.inc
rrv32sri.inc
rrv32sta.inc
rrv32std.inc
rrv32sup.inc
rv32reg.dat
symcpu.pas