Jeppe Johansen 47dbec3111 Rebase to trunk revision ... git-svn-id: branches/laksen/armiw@29708 -		2015-02-15 16:08:18 +00:00
..
aopt386.pas
cgcpu.pas	* modified patch of Paul W to replace leave by mov/pop, resolves #26455	2015-02-05 20:51:12 +00:00
cpubase.inc
cpuelf.pas	Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen).	2014-12-14 16:28:35 +00:00
cpuinfo.pas	+ change always floating point divisions into multiplications if they are a power of two,	2014-11-16 20:47:38 +00:00
cpunode.pas	* isolated segment-related functionality of tabsolutevarsym into i386/i8086-	2014-03-30 15:42:53 +00:00
cpupara.pas	* EMX should be treated the same way as OS/2 with regard to cdecl (the same C compiler is used)	2015-02-09 22:52:06 +00:00
cpupi.pas
cputarg.pas	merged/updated AROS/i386 target to trunk from AROS branch, to support Marcus Sackrow's work on AROS support which will hopefully benefit all Amiga-like targets (classic, MorphOS) on the long run. Compiler only, RTL comes in the next run.	2014-08-17 18:18:07 +00:00
csopt386.pas
daopt386.pas
hlcgcpu.pas	+ added method reference_reset_base with support for different pointer types to	2014-03-28 00:01:18 +00:00
i386att.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386atts.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386int.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386nop.inc
i386op.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386prop.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386tab.inc
n386add.pas	* fix warnings when compiling the compiler with DFA optimizer enabled on i386	2014-08-20 12:28:44 +00:00
n386cal.pas	AROS: syscall (library call) support for based on the Amiga/68k and MorphOS/PPC versions	2014-08-19 00:39:18 +00:00
n386flw.pas	* Generate exception filters data on i386-win32 and x86_64-win64 without using global labels.	2015-01-20 13:52:19 +00:00
n386inl.pas
n386ld.pas	* isolated segment-related functionality of tabsolutevarsym into i386/i8086-	2014-03-30 15:42:53 +00:00
n386mat.pas	* i386: switch the div/mod node to shared code, leaving in place the specific optimization for division by power of 2.	2014-06-15 16:20:53 +00:00
n386mem.pas	* moved x86-specific tpointerdef functionality to architecture-specific	2014-03-30 21:04:36 +00:00
n386set.pas
popt386.pas	+ optimization setting level4	2015-02-08 11:24:30 +00:00
r386ari.inc
r386att.inc
r386con.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386dwrf.inc
r386int.inc
r386iri.inc
r386nasm.inc
r386nor.inc
r386nri.inc
r386num.inc
r386ot.inc
r386rni.inc
r386sri.inc
r386stab.inc
r386std.inc
ra386att.pas
ra386int.pas
rgcpu.pas
rropt386.pas
symcpu.pas	Add new procedure option: po_syscall_has_libsym,	2014-10-03 19:26:16 +00:00