| .. |
|
aasmcpu.pas
|
Fix some optimizations which assume that there are 3 operands
|
2012-10-21 16:20:52 +00:00 |
|
agarmgas.pas
|
- removed no longer used/supported af_allowdirect flag (direct assembler
|
2012-10-21 13:42:58 +00:00 |
|
aoptcpu.pas
|
Disabled MulAdd2MLA and MulSub2MLS Peephole optimizers for thumb2
|
2012-10-22 15:30:24 +00:00 |
|
aoptcpub.pas
|
|
|
|
aoptcpuc.pas
|
|
|
|
aoptcpud.pas
|
|
|
|
armatt.inc
|
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
2012-10-19 18:23:14 +00:00 |
|
armatts.inc
|
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
2012-10-19 18:23:14 +00:00 |
|
armins.dat
|
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
2012-10-19 18:23:14 +00:00 |
|
armnop.inc
|
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
2012-10-19 18:23:14 +00:00 |
|
armop.inc
|
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
2012-10-19 18:23:14 +00:00 |
|
armreg.dat
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
armtab.inc
|
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
2012-10-19 18:23:14 +00:00 |
|
cgcpu.pas
|
Fixed Bsf* functions on platforms that support RBIT
|
2012-10-21 19:13:59 +00:00 |
|
cpubase.pas
|
Use TRegNameTable instead of array[tregisterindex] of string[10]
|
2012-10-22 10:23:21 +00:00 |
|
cpuinfo.pas
|
Fixed Bsf* functions on platforms that support RBIT
|
2012-10-21 19:13:59 +00:00 |
|
cpunode.pas
|
|
|
|
cpupara.pas
|
Added initial support for the Cortex-M4F FPv4_S16 FPU
|
2012-10-08 20:10:45 +00:00 |
|
cpupi.pas
|
o merge of the branch laksen/arm-embedded of Jeppe Johansen:
|
2012-10-21 08:39:52 +00:00 |
|
cputarg.pas
|
|
|
|
hlcgcpu.pas
|
|
|
|
itcpugas.pas
|
Use TRegNameTable instead of array[tregisterindex] of string[10]
|
2012-10-22 10:23:21 +00:00 |
|
narmadd.pas
|
Added initial support for the Cortex-M4F FPv4_S16 FPU
|
2012-10-08 20:10:45 +00:00 |
|
narmcal.pas
|
Added initial support for the Cortex-M4F FPv4_S16 FPU
|
2012-10-08 20:10:45 +00:00 |
|
narmcnv.pas
|
Added initial support for the Cortex-M4F FPv4_S16 FPU
|
2012-10-08 20:10:45 +00:00 |
|
narmcon.pas
|
|
|
|
narminl.pas
|
Added initial support for the Cortex-M4F FPv4_S16 FPU
|
2012-10-08 20:10:45 +00:00 |
|
narmmat.pas
|
Added initial support for the Cortex-M4F FPv4_S16 FPU
|
2012-10-08 20:10:45 +00:00 |
|
narmmem.pas
|
|
|
|
narmset.pas
|
|
|
|
pp.lpi.template
|
|
|
|
raarm.pas
|
|
|
|
raarmgas.pas
|
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
2012-10-19 18:23:14 +00:00 |
|
rarmcon.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rarmdwa.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rarmnor.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rarmnum.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rarmrni.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rarmsri.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rarmsta.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rarmstd.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rarmsup.inc
|
+ Cortex-M3 special registers, resolves #23185
|
2012-10-21 20:06:07 +00:00 |
|
rgcpu.pas
|
Added support for IT block merging
|
2012-10-08 14:07:40 +00:00 |