Jeppe Johansen 6861cbcf16 Allow FoldShiftLdrStr for all sizes of LDR/STR, and disable it for references that post/pre increment the base register on Thumb-2 targets. ... git-svn-id: trunk@26671 -		2014-02-04 17:29:13 +00:00
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aasmcpu.pas	made arm-linux system unit compilable on anything but Thumb2 after r26161	2013-12-03 16:36:34 +00:00
agarmgas.pas	Handle asmextraopt in arm assembler	2014-01-21 00:21:34 +00:00
aoptcpu.pas	Allow FoldShiftLdrStr for all sizes of LDR/STR, and disable it for references that post/pre increment the base register on Thumb-2 targets.	2014-02-04 17:29:13 +00:00
aoptcpub.pas	* set MaxOps to 4 for the optimizer because fpc generates now mla instructions	2012-08-17 12:38:59 +00:00
aoptcpuc.pas
aoptcpud.pas
armatt.inc	added the ADR ARM pseudo instruction to instruction list	2013-11-05 13:16:33 +00:00
armatts.inc	added the ADR ARM pseudo instruction to instruction list	2013-11-05 13:16:33 +00:00
armins.dat	added the ADR ARM pseudo instruction to instruction list	2013-11-05 13:16:33 +00:00
armnop.inc	Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)	2012-10-19 18:23:14 +00:00
armop.inc	added the ADR ARM pseudo instruction to instruction list	2013-11-05 13:16:33 +00:00
armreg.dat	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
armtab.inc	Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)	2012-10-19 18:23:14 +00:00
cgcpu.pas	* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.	2014-02-03 13:28:56 +00:00
cpubase.pas	Reformat and comment is_thumb32_imm	2014-01-13 21:32:28 +00:00
cpuelf.pas	+ Add definitions for ELF header flags.	2013-11-25 13:59:12 +00:00
cpuinfo.pas	Add CPUARM_HAS_UMULL flag	2014-01-02 13:06:18 +00:00
cpunode.pas
cpupara.pas	* handle records with size 0 as function results correctly	2013-12-28 20:19:56 +00:00
cpupi.pas	Fixed problem in estimation of stack size for thumb targets. Types passed by value were not handled properly.	2014-01-14 19:27:15 +00:00
cputarg.pas	* Sync with trunk r23404.	2013-01-16 13:21:51 +00:00
hlcgcpu.pas
itcpugas.pas	* remove unused units from uses statements	2013-01-03 23:07:09 +00:00
narmadd.pas	+ Added method taddnode.use_generic_mul64bit, allowing it to inline full 64-bit multiplications, and fixed ARM to comply (it was not checking for possible 32x32 to 64 optimization after detecting a 64-bit operand, so recently added code for 32x32 to 64 bit optimization was inactive).	2014-01-18 09:59:59 +00:00
narmcal.pas	* moved ARM/x86 ifdef'ed code from ncgcal to virtual methods	2013-04-07 13:42:06 +00:00
narmcnv.pas	+ support for LOC_(C)MMREGISTER in hlcg	2013-05-31 12:05:14 +00:00
narmcon.pas	* remove unused units from uses statements	2013-01-03 23:07:09 +00:00
narminl.pas	added missing closing parentheses	2013-09-04 14:56:53 +00:00
narmmat.pas	Little cleanup after r26669, no functional changes	2014-02-04 08:04:08 +00:00
narmmem.pas	+ arm: tsettings.instructionset	2013-08-25 21:56:12 +00:00
narmset.pas	* fixes arm building after 26004	2013-11-10 17:46:03 +00:00
pp.lpi.template
raarm.pas
raarmgas.pas	support label offsets for ARM like GAS, allows things like ADR r4, .label + 256	2013-11-05 18:10:54 +00:00
rarmcon.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmdwa.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmnor.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmnum.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmrni.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmsri.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmsta.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmstd.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rarmsup.inc	+ Cortex-M3 special registers, resolves #23185	2012-10-21 20:06:07 +00:00
rgcpu.pas	Fixed MLA/MLS peephole optimization and moved it to the generic ARM peephole optimizer.	2014-01-29 17:28:13 +00:00