mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-26 19:43:42 +02:00
585 lines
19 KiB
ObjectPascal
585 lines
19 KiB
ObjectPascal
unit lpc11xx;
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{$goto on}
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{$define lpc11xx}
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interface
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{$PACKRECORDS 2}
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const
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//------------------------- Cortex-M0 Processor Exceptions Numbers -------------------------
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Reset_IRQn = -15; // 1 Reset Vector, invoked on Power up and warm reset
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NonMaskableInt_IRQn = -14; // 2 Non Maskable Interrupt
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HardFault_IRQn = -13; // 3 Cortex-M0 Hard Fault Interrupt
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SVCall_IRQn = -5; // 11 Cortex-M0 SV Call Interrupt
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PendSV_IRQn = -2; // 14 Cortex-M0 Pend SV Interrupt
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SysTick_IRQn = -1; // 15 Cortex-M0 System Tick Interrupt
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//------------------------- LPC11Cxx or LPC11xx Specific Interrupt Numbers -------------------------
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WAKEUP0_IRQn = 0; // All I/O pins can be used as wakeup source.
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WAKEUP1_IRQn = 1; // There are 13 pins in total for LPC11xx
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WAKEUP2_IRQn = 2;
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WAKEUP3_IRQn = 3;
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WAKEUP4_IRQn = 4;
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WAKEUP5_IRQn = 5;
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WAKEUP6_IRQn = 6;
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WAKEUP7_IRQn = 7;
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WAKEUP8_IRQn = 8;
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WAKEUP9_IRQn = 9;
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WAKEUP10_IRQn = 10;
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WAKEUP11_IRQn = 11;
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WAKEUP12_IRQn = 12;
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CAN_IRQn = 13; // CAN Interrupt
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SSP1_IRQn = 14; // SSP1 Interrupt
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I2C_IRQn = 15; // I2C Interrupt
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TIMER_16_0_IRQn = 16; // 16-bit Timer0 Interrupt
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TIMER_16_1_IRQn = 17; // 16-bit Timer1 Interrupt
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TIMER_32_0_IRQn = 18; // 32-bit Timer0 Interrupt
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TIMER_32_1_IRQn = 19; // 32-bit Timer1 Interrupt
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SSP0_IRQn = 20; // SSP0 Interrupt
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UART_IRQn = 21; // UART Interrupt
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ADC_IRQn = 24; // A/D Converter Interrupt
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WDT_IRQn = 25; // Watchdog timer Interrupt
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BOD_IRQn = 26; // Brown Out Detect(BOD) Interrupt
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FMC_IRQn = 27; // Flash Memory Controller Interrupt
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EINT3_IRQn = 28; // External Interrupt 3 Interrupt
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EINT2_IRQn = 29; // External Interrupt 2 Interrupt
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EIN1_IRQn = 30; // External Interrupt 1 Interrupt
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EINT0_IRQn = 31; // External Interrupt 0 Interrupt
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type
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{ ------------- System Control (SYSCON) ------------- }
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TSYSCON_Registers = record
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SYSMEMREMAP : longword;
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PRESETCTRL : longword;
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SYSPLLCTRL : longword;
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SYSPLLSTAT : longword;
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RESERVED0 : array [0 .. 3] of longword;
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SYSOSCCTRL : longword;
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WDTOSCCTRL : longword;
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IRCCTRL : longword;
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RESERVED1 : longword;
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SYSRSTSTAT : longword;
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RESERVED2 : array [0 .. 2] of longword;
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SYSPLLCLKSEL : longword;
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SYSPLLCLKUEN : longword;
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RESERVED3 : array [0 .. 9] of longword;
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MAINCLKSEL : longword;
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MAINCLKUEN : longword;
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SYSAHBCLKDIV : longword;
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RESERVED4 : longword;
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SYSAHBCLKCTRL: longword;
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RESERVED5 : array [0 .. 3] of longword;
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SSP0CLKDIV : longword;
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UARTCLKDIV : longword;
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SSP1CLKDIV : longword;
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RESERVED6 : array [0 .. 11] of longword;
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WDTCLKSEL : longword;
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WDTCLKUEN : longword;
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WDTCLKDIV : longword;
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RESERVED8 : longword;
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CLKOUTCLKSEL : longword;
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CLKOUTUEN : longword;
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CLKOUTDIV : longword;
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RESERVED9 : array [0 .. 4] of longword;
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PIOPORCAP0 : longword;
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PIOPORCAP1 : longword;
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RESERVED10 : array [0 .. 17] of longword;
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BODCTRL : longword;
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SYSTCKCAL : longword;
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RESERVED13 : array [0 .. 6] of longword;
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NMISRC : longword;
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RESERVED14 : array [0 .. 33] of longword;
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STARTAPRP0 : longword;
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STARTERP0 : longword;
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STARTRSRP0CLR: longword;
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STARTSRP0 : longword;
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STARTAPRP1 : longword;
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STARTERP1 : longword;
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STARTRSRP1CLR: longword;
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STARTSRP1 : longword;
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RESERVED17 : array [0 .. 3] of longword;
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PDSLEEPCFG : longword;
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PDAWAKECFG : longword;
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PDRUNCFG : longword;
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RESERVED15 : array [0 .. 109] of longword;
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DEVICE_ID : longword;
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end;
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{ ------------- Pin Connect Block (IOCON) ------------- }
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TIOCON_Registers = record
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PIO2_6 : longword;
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RESERVED0 : longword;
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PIO2_0 : longword;
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RESET_PIO0_0 : longword;
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PIO0_1 : longword;
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PIO1_8 : longword;
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RESERVED1 : longword;
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PIO0_2 : longword;
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PIO2_7 : longword;
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PIO2_8 : longword;
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PIO2_1 : longword;
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PIO0_3 : longword;
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PIO0_4 : longword;
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PIO0_5 : longword;
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PIO1_9 : longword;
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PIO3_4 : longword;
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PIO2_4 : longword;
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PIO2_5 : longword;
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PIO3_5 : longword;
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PIO0_6 : longword;
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PIO0_7 : longword;
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PIO2_9 : longword;
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PIO2_10 : longword;
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PIO2_2 : longword;
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PIO0_8 : longword;
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PIO0_9 : longword;
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SWCLK_PIO0_10: longword;
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PIO1_10 : longword;
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PIO2_11 : longword;
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R_PIO0_11 : longword;
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R_PIO1_0 : longword;
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R_PIO1_1 : longword;
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R_PIO1_2 : longword;
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PIO3_0 : longword;
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PIO3_1 : longword;
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PIO2_3 : longword;
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SWDIO_PIO1_3 : longword;
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PIO1_4 : longword;
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PIO1_11 : longword;
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PIO3_2 : longword;
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PIO1_5 : longword;
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PIO1_6 : longword;
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PIO1_7 : longword;
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PIO3_3 : longword;
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SCK_LOC : longword;
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DSR_LOC : longword;
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DCD_LOC : longword;
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RI_LOC : longword;
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end;
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{ ------------- Power Management Unit (PMU) ------------- }
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TPMU_Registers = record
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PCON : longword;
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GPREG0: longword;
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GPREG1: longword;
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GPREG2: longword;
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GPREG3: longword;
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GPREG4: longword;
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end;
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{ ------------- Flash Controller (FLASHCTRL) ------------- }
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TFLASHCTRL_Registers = record
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RESERVED0: array [0 .. 3] of longword;
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FLASHCFG : longword;
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RESERVED1: array [0 .. 2] of longword;
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FMSSTART : longword;
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FMSSTOP : longword;
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RESERVED2: longword;
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FMSW0 : longword;
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FMSW1 : longword;
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FMSW2 : longword;
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FMSW3 : longword;
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RESERVED3: array [0 .. 1000] of longword;
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FMSTAT : longword;
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RESERVED4: longword;
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FMSTATCLR: longword;
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end;
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{ ------------- General Purpose Input/Output (GPIO) ------------- }
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TGPIO_Registers = record
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MASKED_ACCESS: array [0 .. 4095] of longword;
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RESERVED1 : array [0 .. 4095] of longword;
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DIR : longword;
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IS : longword;
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IBE : longword;
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IEV : longword;
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IE : longword;
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RIS : longword;
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MIS : longword;
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IC : longword;
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end;
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{ ------------- Timer (TMR) ------------- }
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TTMR_Registers = record
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IR : longword;
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TCR : longword;
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TC : longword;
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PR : longword;
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PC : longword;
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MCR : longword;
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MR0 : longword;
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MR1 : longword;
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MR2 : longword;
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MR3 : longword;
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CCR : longword;
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CR0 : longword;
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CR1 : longword;
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RESERVED1: array [0 .. 1] of longword;
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EMR : longword;
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RESERVED2: array [0 .. 11] of longword;
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CTCR : longword;
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PWMC : longword;
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end;
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{ ------------- Universal Asynchronous Receiver Transmitter (UART) ------------- }
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TUART_Registers = record
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RBR_THR_DLL: longword;
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DLM_IER : longword;
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IIR_FCR : longword;
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LCR : longword;
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MCR : longword;
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LSR : longword;
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MSR : longword;
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SCR : longword;
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ACR : longword;
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RESERVED0 : longword;
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FDR : longword;
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RESERVED1 : longword;
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TER : longword;
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RESERVED2 : array [0 .. 5] of longword;
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RS485CTRL : longword;
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ADRMATCH : longword;
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RS485DLY : longword;
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FIFOLVL : longword;
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end;
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{ ------------- Synchronous Serial Communication (SSP) ------------- }
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TSSP_Registers = record
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CR0 : longword;
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CR1 : longword;
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DR : longword;
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SR : longword;
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CPSR: longword;
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IMSC: longword;
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RIS : longword;
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MIS : longword;
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ICR : longword;
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end;
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{ ------------- Inter-Integrated Circuit (I2C) ------------- }
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TI2C_Registers = record
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CONSET : longword;
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STAT : longword;
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DAT : longword;
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ADR0 : longword;
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SCLH : longword;
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SCLL : longword;
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CONCLR : longword;
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MMCTRL : longword;
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ADR1 : longword;
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ADR2 : longword;
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ADR3 : longword;
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DATA_BUFFER: longword;
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MASK0 : longword;
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MASK1 : longword;
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MASK2 : longword;
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MASK3 : longword;
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end;
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{ ------------- Watchdog Timer (WDT) ------------- }
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TWDT_Registers = record
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_MOD : longword;
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TC : longword;
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FEED : longword;
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TV : longword;
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RESERVED0: longword;
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WARNINT : longword;
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WINDOW : longword;
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end;
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{ ------------- Analog-to-Digital Converter (ADC) ------------- }
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TADC_Registers = record
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CR : longword;
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GDR : longword;
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RESERVED0: longword;
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INTEN : longword;
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DR : array [0 .. 7] of longword;
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STAT : longword;
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end;
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{ ------------- CAN Controller (CAN) ------------- }
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TCAN_Registers = record
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CNTL : longword;
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STAT : longword;
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EC : longword;
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BT : longword;
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INT : longword;
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TEST : longword;
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BRPE : longword;
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RESERVED0 : longword;
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IF1_CMDREQ: longword;
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IF1_CMDMSK: longword;
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IF1_MSK1 : longword;
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IF1_MSK2 : longword;
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IF1_ARB1 : longword;
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IF1_ARB2 : longword;
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IF1_MCTRL : longword;
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IF1_DA1 : longword;
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IF1_DA2 : longword;
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IF1_DB1 : longword;
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IF1_DB2 : longword;
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RESERVED1 : array [0 .. 12] of longword;
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IF2_CMDREQ: longword;
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IF2_CMDMSK: longword;
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IF2_MSK1 : longword;
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IF2_MSK2 : longword;
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IF2_ARB1 : longword;
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IF2_ARB2 : longword;
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IF2_MCTRL : longword;
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IF2_DA1 : longword;
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IF2_DA2 : longword;
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IF2_DB1 : longword;
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IF2_DB2 : longword;
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RESERVED2 : array [0 .. 20] of longword;
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TXREQ1 : longword;
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TXREQ2 : longword;
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RESERVED3 : array [0 .. 5] of longword;
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ND1 : longword;
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ND2 : longword;
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RESERVED4 : array [0 .. 5] of longword;
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IR1 : longword;
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IR2 : longword;
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RESERVED5 : array [0 .. 5] of longword;
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MSGV1 : longword;
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MSGV2 : longword;
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RESERVED6 : array [0 .. 5] of longword;
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CLKDIV : longword;
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end;
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// ****************************************************************************
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// Peripheral memory map
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// ****************************************************************************
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const
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{ Base addresses }
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LPC_FLASH_BASE = ($00000000);
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LPC_RAM_BASE = ($10000000);
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LPC_APB0_BASE = ($40000000);
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LPC_AHB_BASE = ($50000000);
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/// APB peripherals
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LPC_I2C_BASE = (LPC_APB0_BASE + $00000);
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LPC_WDT_BASE = (LPC_APB0_BASE + $04000);
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LPC_UART_BASE = (LPC_APB0_BASE + $08000);
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LPC_CT16B0_BASE = (LPC_APB0_BASE + $0C000);
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LPC_CT16B1_BASE = (LPC_APB0_BASE + $10000);
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LPC_CT32B0_BASE = (LPC_APB0_BASE + $14000);
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LPC_CT32B1_BASE = (LPC_APB0_BASE + $18000);
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LPC_ADC_BASE = (LPC_APB0_BASE + $1C000);
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LPC_PMU_BASE = (LPC_APB0_BASE + $38000);
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LPC_FLASHCTRL_BASE = (LPC_APB0_BASE + $3C000);
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LPC_SSP0_BASE = (LPC_APB0_BASE + $40000);
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LPC_IOCON_BASE = (LPC_APB0_BASE + $44000);
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LPC_SYSCON_BASE = (LPC_APB0_BASE + $48000);
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LPC_CAN_BASE = (LPC_APB0_BASE + $50000);
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LPC_SSP1_BASE = (LPC_APB0_BASE + $58000);
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// AHB peripherals
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LPC_GPIO0_BASE = (LPC_AHB_BASE + $00000);
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LPC_GPIO1_BASE = (LPC_AHB_BASE + $10000);
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LPC_GPIO2_BASE = (LPC_AHB_BASE + $20000);
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LPC_GPIO3_BASE = (LPC_AHB_BASE + $30000);
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// ****************************************************************************
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// Peripheral declaration
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// ****************************************************************************
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{$ALIGN 2}
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var
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LPC_I2C : TI2C_Registers absolute(LPC_I2C_BASE);
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LPC_WDT : TWDT_Registers absolute(LPC_WDT_BASE);
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LPC_UART : TUART_Registers absolute(LPC_UART_BASE);
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LPC_TMR16B0 : TTMR_Registers absolute(LPC_CT16B0_BASE);
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LPC_TMR16B1 : TTMR_Registers absolute(LPC_CT16B1_BASE);
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LPC_TMR32B0 : TTMR_Registers absolute(LPC_CT32B0_BASE);
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LPC_TMR32B1 : TTMR_Registers absolute(LPC_CT32B1_BASE);
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LPC_ADC : TADC_Registers absolute(LPC_ADC_BASE);
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LPC_PMU : TPMU_Registers absolute(LPC_PMU_BASE);
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LPC_FLASHCTRL: TPMU_Registers absolute(LPC_PMU_BASE);
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LPC_SSP0 : TSSP_Registers absolute(LPC_SSP0_BASE);
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LPC_SSP1 : TSSP_Registers absolute(LPC_SSP1_BASE);
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LPC_CAN : TCAN_Registers absolute(LPC_CAN_BASE);
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LPC_IOCON : TIOCON_Registers absolute(LPC_IOCON_BASE);
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LPC_SYSCON : TSYSCON_Registers absolute(LPC_SYSCON_BASE);
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LPC_GPIO0 : TGPIO_Registers absolute(LPC_GPIO0_BASE);
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LPC_GPIO1 : TGPIO_Registers absolute(LPC_GPIO1_BASE);
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LPC_GPIO2 : TGPIO_Registers absolute(LPC_GPIO2_BASE);
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LPC_GPIO3 : TGPIO_Registers absolute(LPC_GPIO3_BASE);
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implementation
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procedure NonMaskableInt_interrupt; external name 'NonMaskableInt_interrupt';
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procedure Hardfault_interrupt; external name 'Hardfault_interrupt';
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procedure Startup_Checksum; external name 'Startup_Checksum';
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procedure SVCall_interrupt; external name 'SVCall_interrupt';
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procedure PendSV_interrupt; external name 'PendSV_interrupt';
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procedure SysTick_interrupt; external name 'SysTick_interrupt';
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procedure WAKEUP0_Interrupt; external name 'WAKEUP0_Interrupt';
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procedure WAKEUP1_Interrupt; external name 'WAKEUP1_Interrupt';
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procedure WAKEUP2_Interrupt; external name 'WAKEUP2_Interrupt';
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procedure WAKEUP3_Interrupt; external name 'WAKEUP3_Interrupt';
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procedure WAKEUP4_Interrupt; external name 'WAKEUP4_Interrupt';
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procedure WAKEUP5_Interrupt; external name 'WAKEUP5_Interrupt';
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procedure WAKEUP6_Interrupt; external name 'WAKEUP6_Interrupt';
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procedure WAKEUP7_Interrupt; external name 'WAKEUP7_Interrupt';
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procedure WAKEUP8_Interrupt; external name 'WAKEUP8_Interrupt';
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procedure WAKEUP9_Interrupt; external name 'WAKEUP9_Interrupt';
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procedure WAKEUP10_Interrupt; external name 'WAKEUP10_Interrupt';
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procedure WAKEUP11_Interrupt; external name 'WAKEUP11_Interrupt';
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procedure WAKEUP12_Interrupt; external name 'WAKEUP12_Interrupt';
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procedure CAN_Interrupt; external name 'CAN_Interrupt';
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procedure SSP1_Interrupt; external name 'SSP1_Interrupt';
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procedure I2C_Interrupt; external name 'I2C_Interrupt';
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procedure TIMER16_0_Interrupt; external name 'TIMER16_0_Interrupt';
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procedure TIMER16_1_Interrupt; external name 'TIMER16_1_Interrupt';
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procedure TIMER32_0_Interrupt; external name 'TIMER32_0_Interrupt';
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procedure TIMER32_1_Interrupt; external name 'TIMER32_1_Interrupt';
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procedure SSP0_Interrupt; external name 'SSP0_Interrupt';
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procedure UART_Interrupt; external name 'UART_Interrupt';
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procedure ADC_Interrupt; external name 'ADC_Interrupt';
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procedure WDT_Interrupt; external name 'WDT_Interrupt';
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procedure BOD_Interrupt; external name 'BOD_Interrupt';
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procedure FMC_Interrupt; external name 'FMC_Interrupt';
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procedure EINT3_Interrupt; external name 'EINT3_Interrupt';
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procedure EINT2_Interrupt; external name 'EINT2_Interrupt';
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procedure EINT1_Interrupt; external name 'EINT1_Interrupt';
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procedure EINT0_Interrupt; external name 'EINT0_Interrupt';
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{$I cortexm0_start.inc}
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procedure Vectors; assembler;
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nostackframe;
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label interrupt_vectors;
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asm
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.section ".init.interrupt_vectors"
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interrupt_vectors:
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.long _stack_top // stack top address
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.long Startup
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.long NonMaskableInt_interrupt
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.long Hardfault_interrupt
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.long 0
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.long 0
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.long 0
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.long Startup_Checksum
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.long 0
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.long 0
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.long 0
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.long SVCall_interrupt
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.long 0
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.long 0
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.long PendSV_interrupt
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.long SysTick_interrupt
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.long WAKEUP0_Interrupt
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.long WAKEUP1_Interrupt
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.long WAKEUP2_Interrupt
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.long WAKEUP3_Interrupt
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.long WAKEUP4_Interrupt
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.long WAKEUP5_Interrupt
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.long WAKEUP6_Interrupt
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.long WAKEUP7_Interrupt
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.long WAKEUP8_Interrupt
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.long WAKEUP9_Interrupt
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.long WAKEUP10_Interrupt
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.long WAKEUP11_Interrupt
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.long WAKEUP12_Interrupt
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.long CAN_Interrupt
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.long SSP1_Interrupt
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.long I2C_Interrupt
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.long TIMER16_0_Interrupt
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.long TIMER16_1_Interrupt
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.long TIMER32_0_Interrupt
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.long TIMER32_1_Interrupt
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.long SSP0_Interrupt
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.long UART_Interrupt
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.long 0
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.long 0
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.long ADC_Interrupt
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.long WDT_Interrupt
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.long BOD_Interrupt
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.long FMC_Interrupt
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.long EINT3_Interrupt
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.long EINT2_Interrupt
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.long EINT1_Interrupt
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.long EINT0_Interrupt
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.weak NonMaskableInt_interrupt
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.weak Hardfault_interrupt
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.weak Startup_Checksum
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.weak SVCall_interrupt
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.weak PendSV_interrupt
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.weak SysTick_interrupt
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.weak WAKEUP0_Interrupt
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.weak WAKEUP1_Interrupt
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.weak WAKEUP2_Interrupt
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.weak WAKEUP3_Interrupt
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.weak WAKEUP4_Interrupt
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.weak WAKEUP5_Interrupt
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.weak WAKEUP6_Interrupt
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.weak WAKEUP7_Interrupt
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.weak WAKEUP8_Interrupt
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.weak WAKEUP9_Interrupt
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.weak WAKEUP10_Interrupt
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.weak WAKEUP11_Interrupt
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.weak WAKEUP12_Interrupt
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.weak CAN_Interrupt
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.weak SSP1_Interrupt
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.weak I2C_Interrupt
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.weak TIMER16_0_Interrupt
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.weak TIMER16_1_Interrupt
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.weak TIMER32_0_Interrupt
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.weak TIMER32_1_Interrupt
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.weak SSP0_Interrupt
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.weak UART_Interrupt
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.weak ADC_Interrupt
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.weak WDT_Interrupt
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.weak BOD_Interrupt
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.weak FMC_Interrupt
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.weak EINT3_Interrupt
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.weak EINT2_Interrupt
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.weak EINT1_Interrupt
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.weak EINT0_Interrupt
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.set NonMaskableInt_interrupt, Startup
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.set Hardfault_interrupt , Startup
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.set SVCall_interrupt , Startup
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.set PendSV_interrupt , Startup
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.set SysTick_interrupt , Startup
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.set WAKEUP0_Interrupt , Startup
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.set WAKEUP1_Interrupt , Startup
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.set WAKEUP2_Interrupt , Startup
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.set WAKEUP3_Interrupt , Startup
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.set WAKEUP4_Interrupt , Startup
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.set WAKEUP5_Interrupt , Startup
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.set WAKEUP6_Interrupt , Startup
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.set WAKEUP7_Interrupt , Startup
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.set WAKEUP8_Interrupt , Startup
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.set WAKEUP9_Interrupt , Startup
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.set WAKEUP10_Interrupt , Startup
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.set WAKEUP11_Interrupt , Startup
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.set WAKEUP12_Interrupt , Startup
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.set CAN_Interrupt , Startup
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.set SSP1_Interrupt , Startup
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.set I2C_Interrupt , Startup
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.set TIMER16_0_Interrupt, Startup
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.set TIMER16_1_Interrupt, Startup
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.set TIMER32_0_Interrupt, Startup
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.set TIMER32_1_Interrupt, Startup
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.set SSP0_Interrupt , Startup
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.set UART_Interrupt , Startup
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.set ADC_Interrupt , Startup
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.set WDT_Interrupt , Startup
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.set BOD_Interrupt , Startup
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.set FMC_Interrupt , Startup
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.set EINT3_Interrupt , Startup
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.set EINT2_Interrupt , Startup
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.set EINT1_Interrupt , Startup
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.set EINT0_Interrupt , Startup
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.text
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end;
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end.
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