Jeppe Johansen 74a7963d58 Redo overflow checking code. ... Fix shift operators in case of unsigned subreg operations. There should be no sign extension here. Add some unittest implementations that test stack execution and writing to readonly constants. git-svn-id: branches/laksen/riscv_new@39762 -		2018-09-16 18:37:59 +00:00
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aoptcpu.pas	Added implementation of InstructionLoadsFromReg.	2018-07-22 18:38:07 +00:00
aoptcpub.pas
aoptcpuc.pas
aoptcpud.pas
cgcpu.pas	Redo overflow checking code.	2018-09-16 18:37:59 +00:00
cpubase.pas	Add rounding mode operands.	2018-09-01 19:48:44 +00:00
cpuinfo.pas	Add RV64GC cpu type.	2018-07-21 22:34:42 +00:00
cpunode.pas
cpupara.pas	* cleanup	2018-09-07 19:22:59 +00:00
cpupi.pas
cputarg.pas
hlcgcpu.pas
itcpugas.pas
nrv64add.pas
nrv64cal.pas
nrv64cnv.pas	* fix int to real for non-register locations	2018-07-22 20:48:15 +00:00
nrv64ld.pas
nrv64mat.pas
rarv64gas.pas	Write real atomic operations, and add memory barrier operations.	2018-07-29 16:43:09 +00:00
rarv.pas	Write real atomic operations, and add memory barrier operations.	2018-07-29 16:43:09 +00:00
rrv32con.inc
rrv32dwa.inc
rrv32nor.inc
rrv32num.inc
rrv32rni.inc
rrv32sri.inc
rrv32sta.inc
rrv32std.inc
rrv32sup.inc
rv32reg.dat
symcpu.pas