Jonas Maebe 8244d366d0 - moved deallocation of NR_PIC_OFFSET_REG from the x86_64 to the i386 code ... generator (as it's also allocated for i386 rather than for x86_64) git-svn-id: trunk@28928 -		2014-10-25 17:47:44 +00:00
..
aopt386.pas
cgcpu.pas	- moved deallocation of NR_PIC_OFFSET_REG from the x86_64 to the i386 code	2014-10-25 17:47:44 +00:00
cpubase.inc
cpuelf.pas	AROS: assembler fixes	2014-08-18 11:25:55 +00:00
cpuinfo.pas	+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.	2014-04-13 19:21:54 +00:00
cpunode.pas
cpupara.pas	* fix working with short record function results under OS/2	2014-10-20 15:40:17 +00:00
cpupi.pas
cputarg.pas	merged/updated AROS/i386 target to trunk from AROS branch, to support Marcus Sackrow's work on AROS support which will hopefully benefit all Amiga-like targets (classic, MorphOS) on the long run. Compiler only, RTL comes in the next run.	2014-08-17 18:18:07 +00:00
csopt386.pas
daopt386.pas
hlcgcpu.pas
i386att.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386atts.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386int.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386nop.inc
i386op.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386prop.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i386tab.inc
n386add.pas	* fix warnings when compiling the compiler with DFA optimizer enabled on i386	2014-08-20 12:28:44 +00:00
n386cal.pas	AROS: syscall (library call) support for based on the Amiga/68k and MorphOS/PPC versions	2014-08-19 00:39:18 +00:00
n386flw.pas	* Provide initialization of all variables, fixes cycling with OPT="-dTEST_WIN32_SEH -OoDFA".	2014-09-08 18:08:12 +00:00
n386inl.pas
n386ld.pas
n386mat.pas	* i386: switch the div/mod node to shared code, leaving in place the specific optimization for division by power of 2.	2014-06-15 16:20:53 +00:00
n386mem.pas
n386set.pas
popt386.pas	* i386: For integer comparisons with zero, emit "test $-1,%reg" instead of "test %reg,%reg". It is more spilling-friendly, because it transforms into "test $-1,spilltemp" and does not require a register.	2014-04-20 19:16:58 +00:00
r386ari.inc
r386att.inc
r386con.inc
r386dwrf.inc
r386int.inc
r386iri.inc
r386nasm.inc
r386nor.inc
r386nri.inc
r386num.inc
r386ot.inc
r386rni.inc
r386sri.inc
r386stab.inc
r386std.inc
ra386att.pas
ra386int.pas
rgcpu.pas
rropt386.pas
symcpu.pas	Add new procedure option: po_syscall_has_libsym,	2014-10-03 19:26:16 +00:00