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aasmcpu.pas
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+ MIPS: Use INS and EXT instructions for bit manipulations when target CPU type is set to mips32r2.
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2013-07-02 14:21:29 +00:00 |
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aoptcpu.pas
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+ MIPS: started the peephole optimizer.
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2013-07-20 13:44:21 +00:00 |
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aoptcpub.pas
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* Patch from Fuxin Zhang: other mips and mipsel CPUs changes
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2012-06-07 23:20:06 +00:00 |
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aoptcpud.pas
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cgcpu.pas
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* MIPS: set pi_do_call flag for assembler procedures with stackframes, so in PIC mode it further receives pi_needs_got in PIC mode and allocates the GP save temp.
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2013-07-20 13:42:41 +00:00 |
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cpubase.pas
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+ MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare.
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2013-07-19 14:06:47 +00:00 |
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cpuelf.pas
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+ MIPS linker: support linking PIC object files with non-PIC ones, by routing absolute calls into PIC code through stubs that load R25.
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2013-03-31 19:58:52 +00:00 |
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cpugas.pas
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* MIPS: 3-operand forms of DIV and DIVU are not macros if first operand is $zero.
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2013-06-20 13:14:38 +00:00 |
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cpuinfo.pas
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* Fixed label optimizer to work with MIPS, and enabled level 1 optimization for MIPS targets.
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2013-07-03 14:40:24 +00:00 |
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cpunode.pas
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Remove more TABs in sources
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2012-09-06 08:11:59 +00:00 |
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cpupara.pas
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* MIPS: floating point parameters on stack should be loaded to/from FPU registers directly, without using temp.
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2013-07-17 11:00:46 +00:00 |
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cpupi.pas
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* MIPS: set pi_do_call flag for assembler procedures with stackframes, so in PIC mode it further receives pi_needs_got in PIC mode and allocates the GP save temp.
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2013-07-20 13:42:41 +00:00 |
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cputarg.pas
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+ ELF linker back-ends for ARM and MIPS.
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2013-01-13 18:05:19 +00:00 |
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hlcgcpu.pas
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+ MIPS: Use INS and EXT instructions for bit manipulations when target CPU type is set to mips32r2.
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2013-07-02 14:21:29 +00:00 |
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itcpugas.pas
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mipsreg.dat
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Change std reg names to allow use with GAS assembler
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2012-07-04 16:24:11 +00:00 |
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ncpuadd.pas
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+ MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare.
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2013-07-19 14:06:47 +00:00 |
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ncpucall.pas
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Remove more TABs in sources
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2012-09-06 08:11:59 +00:00 |
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ncpucnv.pas
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+ MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare.
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2013-07-19 14:06:47 +00:00 |
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ncpuinln.pas
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ncpuld.pas
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- Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels.
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2013-06-02 10:49:17 +00:00 |
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ncpumat.pas
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+ MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare.
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2013-07-19 14:06:47 +00:00 |
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ncpuset.pas
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* MIPS case node: simplified code a bit.
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2013-06-15 12:36:21 +00:00 |
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opcode.inc
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- MIPS: removed opcodes that are not in any known documentation.
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2013-07-01 06:09:53 +00:00 |
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racpugas.pas
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+ Added mips32r2 opcodes needed for pic32.
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2013-06-03 20:01:30 +00:00 |
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rgcpu.pas
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+ MIPS: prevent coalescing written-to registers with $sp,$fp,$zero and $at.
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2013-06-15 04:04:08 +00:00 |
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rmipscon.inc
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rmipsdwf.inc
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rmipsgas.inc
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rmipsgri.inc
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rmipsgss.inc
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rmipsnor.inc
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rmipsnum.inc
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rmipsrni.inc
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rmipssri.inc
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Change std reg names to allow use with GAS assembler
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2012-07-04 16:24:11 +00:00 |
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rmipssta.inc
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rmipsstd.inc
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Change std reg names to allow use with GAS assembler
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2012-07-04 16:24:11 +00:00 |
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rmipssup.inc
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strinst.inc
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- MIPS: removed opcodes that are not in any known documentation.
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2013-07-01 06:09:53 +00:00 |
