florian fdae200281 * RiscV64: don't use addiw for OS_32 to OS_32 type conversions obviously		2024-09-26 21:48:53 +02:00
..
aoptcpu.pas	* do no generated debug comment in assembler output of RiscV if not requested	2024-05-25 20:16:42 +02:00
aoptcpub.pas
aoptcpuc.pas
aoptcpud.pas
cgcpu.pas	* RiscV64: don't use addiw for OS_32 to OS_32 type conversions obviously	2024-09-26 21:48:53 +02:00
cpuinfo.pas	+ Risc-V: make use of zext.h if available	2024-08-14 22:37:26 +02:00
cpunode.pas
cpupara.pas	+ Risc-V 64: tcpuparamanager.get_saved_registers_int and tcpuparamanager.get_saved_registers_fpu	2024-08-06 22:56:35 +02:00
cpupi.pas
cputarg.pas
hlcgcpu.pas
nrv64add.pas
nrv64cal.pas
nrv64cnv.pas
nrv64ld.pas
nrv64mat.pas
rrv64con.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
rrv64dwa.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
rrv64nor.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
rrv64num.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
rrv64rni.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
rrv64sri.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
rrv64sta.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
rrv64std.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
rrv64sup.inc	+ added Risc-V register information file generation to the compiler Makefile	2022-05-31 22:38:30 +02:00
symcpu.pas
tripletcpu.pas	* correct tripletcpustr, resolves #40301	2023-05-31 20:26:50 +02:00