fpc/compiler/x86_64
yury e367577bf1 + added support for x86_64-android target.
git-svn-id: trunk@39956 -
2018-10-17 16:56:27 +00:00
..
aoptcpu.pas + patch by J. Gareth Moreton: x86 optimisations for Jcc and SETcc, resolves #33899 2018-06-25 20:40:05 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas * forgotten part of r39750 2018-09-13 20:20:40 +00:00
cpubase.inc * replaced the saved_XXX_registers arrays with virtual methods inside 2018-04-19 21:22:16 +00:00
cpuelf.pas + added support for x86_64-android target. 2018-10-17 16:56:27 +00:00
cpuinfo.pas + implementation of the vectorcall calling convention by J. Gareth Moreton 2018-02-11 17:50:37 +00:00
cpunode.pas
cpupara.pas * converted Boolean8 to an internal type, and mapped Boolean to the 2018-10-16 21:14:18 +00:00
cpupi.pas * forgotten part of r39750 2018-09-13 20:20:40 +00:00
cputarg.pas + added support for x86_64-android target. 2018-10-17 16:56:27 +00:00
hlcgcpu.pas * keep track of the temp position separately from the offset in references, 2018-04-22 17:03:16 +00:00
nx64add.pas * removed unused units 2017-05-09 19:53:14 +00:00
nx64cal.pas * removed unused units 2017-05-09 19:53:14 +00:00
nx64cnv.pas * removed unused units 2017-05-09 19:53:14 +00:00
nx64flw.pas * removed unused units 2017-05-09 19:53:14 +00:00
nx64inl.pas
nx64mat.pas + support mmx shifting 2018-02-27 21:40:12 +00:00
nx64set.pas * keep track of the temp position separately from the offset in references, 2018-04-22 17:03:16 +00:00
r8664ari.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664att.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664con.inc * fix flag subregs after r38206 2018-03-11 20:30:11 +00:00
r8664dwrf.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664int.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664iri.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664nasm.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664nor.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664num.inc * fix flag subregs after r38206 2018-03-11 20:30:11 +00:00
r8664ot.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664rni.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664sri.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664stab.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8664std.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
rax64att.pas * fix .seh_savereg: the offset is checked with a bitmask, not a divisor, so use "and", not "mod" 2018-10-07 12:25:09 +00:00
rax64int.pas + (slightly) patch by Emelyanov Roman to add support of SEH directive in FPC internal assembler with INTEL syntax, resolves #29894 2018-02-24 16:14:08 +00:00
rgcpu.pas
symcpu.pas
win64unw.pas * Removed creation of unused symbol. It was needed before r35492. 2017-03-09 13:51:23 +00:00
x8664ats.inc + patch by J. Gareth Moreton to support BMI2 instructions 2018-10-07 10:10:19 +00:00
x8664att.inc + patch by J. Gareth Moreton to support BMI2 instructions 2018-10-07 10:10:19 +00:00
x8664int.inc + patch by J. Gareth Moreton to support BMI2 instructions 2018-10-07 10:10:19 +00:00
x8664nop.inc + patch by J. Gareth Moreton to support BMI2 instructions 2018-10-07 10:10:19 +00:00
x8664op.inc + patch by J. Gareth Moreton to support BMI2 instructions 2018-10-07 10:10:19 +00:00
x8664pro.inc + patch by J. Gareth Moreton to support BMI2 instructions 2018-10-07 10:10:19 +00:00
x8664tab.inc + patch by J. Gareth Moreton to support BMI2 instructions 2018-10-07 10:10:19 +00:00