Jeppe Johansen 2678522db5 - RISC-V: Add controller types for common RV32 MCUs. ... - Adds initial controller units for these MCUs. Code contributed by Michael Ring git-svn-id: trunk@43935 -		2020-01-13 22:54:26 +00:00
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aasmcpu.pas	* fix case completeness and unreachable code warnings in compiler that would	2019-05-12 14:29:03 +00:00
agrvgas.pas	- RISC-V: Add controller types for common RV32 MCUs.	2020-01-13 22:54:26 +00:00
aoptcpurv.pas	- RISC-V: Share optimizations between 32 and 64-bit.	2020-01-13 22:49:23 +00:00
cgrv.pas	Add explicit smallint typecast to first marameter of SarSmallint call to avoid range check errors	2019-11-29 23:26:45 +00:00
hlcgrv.pas	* on Mach-O, PECOFF and ELF platforms, write local symbols as hidden/	2019-07-07 21:33:43 +00:00
nrvadd.pas	Comparison nodes are always in LOC_REGISTER, never in LOC_JUMP for riscv32 or riscv64 CPUs	2019-11-29 23:28:05 +00:00
nrvcnv.pas
nrvcon.pas
nrvinl.pas	+ software handling of exceptions on arm	2019-07-28 21:06:36 +00:00
nrvset.pas
rarvgas.pas
rgcpu.pas	Add explicit smallint typecast to first marameter of SarSmallint call to avoid range check errors	2019-11-29 23:26:45 +00:00