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362 lines
13 KiB
ObjectPascal
362 lines
13 KiB
ObjectPascal
{
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Copyright (c) 2015 by the Free Pascal Development team
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Generates Motorola 68k inline nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit n68kinl;
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{$i fpcdefs.inc}
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interface
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uses
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node,ninl,ncginl,symtype,cpubase;
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type
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t68kinlinenode = class(tcgInlineNode)
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function first_abs_real: tnode; override;
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function first_sqr_real: tnode; override;
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function first_sqrt_real: tnode; override;
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{function first_arctan_real: tnode; override;
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function first_ln_real: tnode; override;}
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function first_cos_real: tnode; override;
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function first_sin_real: tnode; override;
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function first_int_real: tnode; override;
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function first_frac_real: tnode; override;
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procedure second_abs_real; override;
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procedure second_sqr_real; override;
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procedure second_sqrt_real; override;
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{procedure second_arctan_real; override;
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procedure second_ln_real; override;}
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procedure second_cos_real; override;
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procedure second_sin_real; override;
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procedure second_int_real; override;
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procedure second_frac_real; override;
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{procedure second_prefetch; override;
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procedure second_abs_long; override;}
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protected
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function second_incdec_tempregdef: tdef; override;
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private
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procedure second_do_operation(op: TAsmOp);
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end;
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implementation
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uses
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globtype,verbose,globals,cutils,
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cpuinfo,defutil,symdef,aasmdata,aasmcpu,aasmtai,
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cgbase,cgutils,pass_1,pass_2,
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ncgutil,cgobj,cgcpu,hlcgobj;
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{*****************************************************************************
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t68kinlinenode
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*****************************************************************************}
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function t68kinlinenode.first_abs_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_abs_real
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else
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begin
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case current_settings.fputype of
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fpu_68881,fpu_coldfire:
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expectloc:=LOC_FPUREGISTER;
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else
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internalerror(2015022206);
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end;
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first_abs_real:=nil;
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end;
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end;
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function t68kinlinenode.first_sqr_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_sqr_real
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else
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begin
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case current_settings.fputype of
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fpu_68881,fpu_coldfire:
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expectloc:=LOC_FPUREGISTER;
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else
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internalerror(2015022201);
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end;
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first_sqr_real:=nil;
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end;
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end;
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function t68kinlinenode.first_sqrt_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_sqrt_real
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else
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begin
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case current_settings.fputype of
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fpu_68881,fpu_coldfire:
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expectloc:=LOC_FPUREGISTER;
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else
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internalerror(2015022203);
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end;
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first_sqrt_real:=nil;
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end;
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end;
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function t68kinlinenode.first_sin_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_sin_real
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else
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begin
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case current_settings.fputype of
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fpu_68881:
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expectloc:=LOC_FPUREGISTER;
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fpu_soft,fpu_coldfire:
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begin
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result:=inherited first_sin_real;
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exit;
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end;
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else
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internalerror(2015022203);
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end;
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first_sin_real:=nil;
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end;
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end;
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function t68kinlinenode.first_cos_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_cos_real
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else
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begin
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case current_settings.fputype of
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fpu_68881:
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expectloc:=LOC_FPUREGISTER;
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fpu_soft,fpu_coldfire:
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begin
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result:=inherited first_cos_real;
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exit;
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end;
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else
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internalerror(2015022203);
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end;
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first_cos_real:=nil;
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end;
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end;
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function t68kinlinenode.first_int_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_int_real
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else
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begin
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case current_settings.fputype of
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fpu_68881,fpu_coldfire:
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expectloc:=LOC_FPUREGISTER;
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else
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internalerror(2016112701);
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end;
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first_int_real:=nil;
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end;
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end;
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function t68kinlinenode.first_frac_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_frac_real
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else
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begin
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case current_settings.fputype of
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fpu_68881,fpu_coldfire:
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expectloc:=LOC_FPUREGISTER;
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else
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internalerror(2017052103);
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end;
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first_frac_real:=nil;
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end;
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end;
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procedure t68kinlinenode.second_abs_real;
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_abs_real called!')));
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second_do_operation(A_FABS);
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end;
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procedure t68kinlinenode.second_sqr_real;
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begin
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secondpass(left);
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case current_settings.fputype of
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fpu_68881,fpu_coldfire:
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_sqr_real called!')));
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hlcg.location_force_fpureg(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
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location_copy(location,left.location);
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if left.location.loc=LOC_CFPUREGISTER then
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_srq_real called!: left was cfpuregister!')));
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location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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location.loc := LOC_FPUREGISTER;
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cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmlist,OS_NO,OS_NO,left.location.register,location.register);
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end;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FMUL,fpuregopsize,left.location.register,location.register));
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end;
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else
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internalerror(2015022202);
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end;
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end;
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procedure t68kinlinenode.second_sqrt_real;
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_sqrt_real called!')));
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second_do_operation(A_FSQRT);
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end;
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procedure t68kinlinenode.second_sin_real;
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_sin_real called!')));
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second_do_operation(A_FSIN);
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end;
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procedure t68kinlinenode.second_cos_real;
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_cos_real called!')));
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second_do_operation(A_FCOS);
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end;
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procedure t68kinlinenode.second_int_real;
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_int_real called!')));
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second_do_operation(A_FINTRZ);
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end;
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procedure t68kinlinenode.second_do_operation(op: TAsmOp);
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var
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href: TReference;
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begin
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secondpass(left);
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case current_settings.fputype of
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fpu_68881,fpu_coldfire:
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begin
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location_reset(location,LOC_FPUREGISTER,left.location.size);
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case left.location.loc of
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LOC_FPUREGISTER:
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begin
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location.register:=left.location.register;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(op,fpuregopsize,location.register))
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end;
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LOC_CFPUREGISTER:
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begin
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location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,fpuregopsize,left.location.register,location.register));
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end;
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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href:=left.location.reference;
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tcg68k(cg).fixref(current_asmdata.CurrAsmList,href,current_settings.fputype = fpu_coldfire);
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,tcgsize2opsize[left.location.size],href,location.register));
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end;
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else
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internalerror(2015022205);
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end;
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end;
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else
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internalerror(2015022204);
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end;
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end;
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procedure t68kinlinenode.second_frac_real;
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var
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href: TReference;
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hreg: TRegister;
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begin
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secondpass(left);
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case current_settings.fputype of
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fpu_68881,fpu_coldfire:
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begin
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location_reset(location,LOC_FPUREGISTER,left.location.size);
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case left.location.loc of
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LOC_FPUREGISTER,LOC_CFPUREGISTER:
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begin
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hreg:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmlist,OS_NO,OS_NO,left.location.register,location.register);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FINTRZ,fpuregopsize,left.location.register,hreg));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FSUB,fpuregopsize,hreg,location.register));
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end;
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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hreg:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
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href:=left.location.reference;
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tcg68k(cg).fixref(current_asmdata.CurrAsmList,href,current_settings.fputype = fpu_coldfire);
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cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmlist,left.location.size,OS_NO,href,location.register);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FINTRZ,fpuregopsize,location.register,hreg));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FSUB,fpuregopsize,hreg,location.register));
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end;
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else
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internalerror(2017052101);
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end;
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end;
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else
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internalerror(2017052102);
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end;
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end;
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{ ideas for second_abs_long (KB) }
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{ This is probably faster on 68000 than the generic implementation,
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because shifting is slow on the original 68000, maybe also on the 68020?
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Also needs to be tested on 040/060. This can also work on a CF.
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input - d0, output - d2
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move.l d0,d2
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btst #31,d2
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sne d1
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extb.l d1 (or ext.w + ext.l on 68000)
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eor.l d1,d2
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sub.l d1,d2
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}
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{ Solution using bitfield extraction, we don't support the necessary asm
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construct for this yet, probably this is the fastest on 020, slower on
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040/060 than the one above, doesn't work on '000 or CF.
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input - d0, output - d2
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move.l d0,d2
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bfexts d0[0:1],d1
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eor.l d1,d2
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sub.l d1,d2
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}
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function t68kinlinenode.second_incdec_tempregdef: tdef;
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begin
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{ this kludge results in the increment/decrement value of inc/dec to be loaded
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always in a datareg, regardless of the target type. This results in significantly
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better code on m68k, where if the inc/decrement is loaded to an address register
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for pointers, the compiler will generate a bunch of useless data<->address register
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shuffling, as it cannot do some operations on address registers (like shifting
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or multiplication) (KB) }
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second_incdec_tempregdef:=cgsize_orddef(def_cgsize(left.resultdef));
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end;
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begin
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cinlinenode:=t68kinlinenode;
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end.
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