| .. |
|
aasmcpu.pas
|
* case of identifiers fixed
|
2016-04-24 20:01:43 +00:00 |
|
agx86att.pas
|
Added x86_64-embedded target. Patch from Benjamin Rosseaux
|
2016-02-14 10:57:00 +00:00 |
|
agx86int.pas
|
+ generate .debug_aranges sections for dwarf debug info: enables faster address to debug info translation
|
2016-04-08 20:19:59 +00:00 |
|
agx86nsm.pas
|
+ generate .debug_aranges sections for dwarf debug info: enables faster address to debug info translation
|
2016-04-08 20:19:59 +00:00 |
|
aoptx86.pas
|
+ TX86AsmOptimizer.OptPass1VMOVAP for i386 and x86-64
|
2016-05-01 09:37:21 +00:00 |
|
cga.pas
|
|
|
|
cgx86.pas
|
* always use vmov variants of instructions if avx is enabled
|
2016-04-24 20:03:15 +00:00 |
|
cpubase.pas
|
* Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471.
|
2016-02-09 16:48:32 +00:00 |
|
hlcgx86.pas
|
* synchronized with privatetrunk till r30095
|
2015-03-05 20:32:15 +00:00 |
|
itcpugas.pas
|
* Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471.
|
2016-02-09 16:48:32 +00:00 |
|
itx86int.pas
|
|
|
|
ni86mem.pas
|
|
|
|
nx86add.pas
|
* converted register_maybe_adjust_setbase() to the high level code generator
|
2015-12-05 18:03:37 +00:00 |
|
nx86cal.pas
|
+ also allow x86 call ref for references that contain only non-imaginary registers (no infinite spilling problems there either)
|
2015-11-11 16:33:48 +00:00 |
|
nx86cnv.pas
|
* replaced current_procinfo.currtrue/falselabel with storing the true/false
|
2015-08-27 18:28:57 +00:00 |
|
nx86con.pas
|
|
|
|
nx86inl.pas
|
* converted register_maybe_adjust_setbase() to the high level code generator
|
2015-12-05 18:03:37 +00:00 |
|
nx86ld.pas
|
nx86ld.pas, tx86loadnode:
|
2016-03-18 22:39:41 +00:00 |
|
nx86mat.pas
|
+ i386 compiler tracks now flag usage if needed, so the mov $0,reg -> xor reg,reg transformation can be enabled
|
2016-04-22 19:44:26 +00:00 |
|
nx86mem.pas
|
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
|
2015-02-23 22:56:00 +00:00 |
|
nx86set.pas
|
* converted register_maybe_adjust_setbase() to the high level code generator
|
2015-12-05 18:03:37 +00:00 |
|
rax86.pas
|
* (extended and modified) patch by Emelyanov Roman to add suport of RDRAND, RDSEED and TSX instructions set, resolves issue #29893.
|
2016-03-28 19:08:13 +00:00 |
|
rax86att.pas
|
- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
|
2014-11-16 16:37:26 +00:00 |
|
rax86int.pas
|
* Replaced hacks with resetting 'c' to zero and decreasing inputpointer by boolean parameter to skipcomment and skipoldtpcomment. This parameter specifies whether first character of comment should be read.
|
2016-01-03 17:07:15 +00:00 |
|
rgx86.pas
|
|
|
|
symi86.pas
|
* changed {$ifdef x86} code in defcmp into virtual methods
|
2015-10-28 18:06:27 +00:00 |
|
symx86.pas
|
* adaptation for symx86 to r32340
|
2015-11-15 23:15:43 +00:00 |
|
x86ins.dat
|
+ support xgetbv instruction, resolves issue #29958
|
2016-04-03 20:53:10 +00:00 |
|
x86reg.dat
|
|
|
