paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-07-27 19:06:05 +02:00
Code Issues Packages Projects Releases Wiki Activity
ada3d2050c
fpc/compiler/riscv32
History
florian 637976e83f * patch by Marģers to unify internal error numbers, resolves #37888 
git-svn-id: trunk@47103 -
2020-10-13 19:59:01 +00:00
..
aoptcpu.pas - RISC-V: Share optimizations between 32 and 64-bit. 2020-01-13 22:49:23 +00:00
aoptcpub.pas
aoptcpuc.pas Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 2018-07-20 08:21:15 +00:00
aoptcpud.pas
cgcpu.pas - RISC-V: Share optimizations between 32 and 64-bit. 2020-01-13 22:49:23 +00:00
cpubase.pas - RISC-V: Share optimizations between 32 and 64-bit. 2020-01-13 22:49:23 +00:00
cpuinfo.pas * disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does 2020-01-29 22:21:07 +00:00
cpunode.pas * RISC-V 32 compilation fixed 2018-07-26 19:18:47 +00:00
cpupara.pas * RiscV32: corrected tcpuparamanager.getcgtempparaloc, resolves #37709 2020-09-08 20:30:59 +00:00
cpupi.pas * fix case completeness and unreachable code warnings in compiler that would 2019-05-12 14:29:03 +00:00
cputarg.pas
hlcgcpu.pas
itcpugas.pas * RISC-V 32 compilation fixed 2018-07-26 19:18:47 +00:00
nrv32add.pas
nrv32cal.pas * RISC-V 32 compilation fixed 2018-07-26 19:18:47 +00:00
nrv32cnv.pas * fix case completeness and unreachable code warnings in compiler that would 2019-05-12 14:29:03 +00:00
nrv32mat.pas * RiscV32 correctly set operands of div/mod operations, resolves #37743 2020-09-12 21:32:11 +00:00
rarv32.pas
rarv32gas.pas * patch by Marģers to unify internal error numbers, resolves #37888 2020-10-13 19:59:01 +00:00
rrv32con.inc
rrv32dwa.inc
rrv32nor.inc
rrv32num.inc Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 2018-07-20 08:21:15 +00:00
rrv32rni.inc
rrv32sri.inc Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 2018-07-20 08:21:15 +00:00
rrv32sta.inc
rrv32std.inc
rrv32sup.inc
rv32reg.dat Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. 2018-07-20 08:21:15 +00:00
symcpu.pas
tripletcpu.pas * mark all external assemblers using an LLVM tool using af_llvm 2020-07-19 14:30:35 +00:00