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a64att.inc
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+ Aarch64: completed LSE support for all interlocked operations
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2021-04-16 19:33:31 +00:00 |
a64atts.inc
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+ Aarch64: completed LSE support for all interlocked operations
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2021-04-16 19:33:31 +00:00 |
a64ins.dat
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+ Aarch64: completed LSE support for all interlocked operations
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2021-04-16 19:33:31 +00:00 |
a64nop.inc
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a64op.inc
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+ Aarch64: completed LSE support for all interlocked operations
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2021-04-16 19:33:31 +00:00 |
a64reg.dat
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
a64tab.inc
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* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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2015-05-14 14:42:12 +00:00 |
aasmcpu.pas
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* AArch64: fix spilling information for BFI
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2021-05-01 13:58:07 +00:00 |
agcpugas.pas
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Use as-clang as idtxt for as_aarch64_clang_gas_info
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2021-04-28 23:03:47 +00:00 |
aoptcpu.pas
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+ Aarch64: FMovFMov2FMov 2 optimization
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2021-09-01 09:31:14 +02:00 |
aoptcpub.pas
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* fix case completeness and unreachable code warnings in compiler that would
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2019-05-12 14:29:03 +00:00 |
aoptcpud.pas
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cgcpu.pas
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+ stack pages need to be touched on aarch64-win64 as well
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2021-06-24 20:02:26 +00:00 |
cpubase.pas
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+ generate initial cfi for aarch64
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2021-02-17 20:43:37 +00:00 |
cpuinfo.pas
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+ move often used floating point constants into registers
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2021-09-05 18:19:58 +02:00 |
cpunode.pas
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+ implement compiler support for SEH on Win64
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2020-04-21 06:06:05 +00:00 |
cpupara.pas
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* Initialize result out parameter by caling the constructor Init, not the method Reset.
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2020-12-07 16:35:46 +00:00 |
cpupi.pas
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+ implement compiler support for SEH on Win64
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2020-04-21 06:06:05 +00:00 |
cputarg.pas
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+ FreeBSD/AArch64 support (patch by Mikaël Urankar, mantis #38441)
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2021-04-10 07:57:28 +00:00 |
hlcgcpu.pas
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* AArch64: fix storing a 32 bit value in the lower 32 bits of a 64 bit
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2021-04-19 20:52:12 +00:00 |
itcpugas.pas
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ncpuadd.pas
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+ support for software floating point exception handling on AArch64 (-CE)
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2019-09-01 17:26:11 +00:00 |
ncpucnv.pas
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* Removed unused local vars.
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2018-11-02 18:44:29 +00:00 |
ncpucon.pas
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* avoid that -0.0 is handled by the eor optimization
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2019-09-04 20:45:24 +00:00 |
ncpuflw.pas
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* patch by Marģers to unify internal error numbers, resolves #37888
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2020-10-13 19:59:01 +00:00 |
ncpuinl.pas
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+ Aarch64: directly inline code for frac(...)
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2021-04-25 09:26:47 +00:00 |
ncpumat.pas
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Avoid range/overflow error after commit #49290
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2021-04-30 09:55:11 +00:00 |
ncpumem.pas
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* keep track of the temp position separately from the offset in references,
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2018-04-22 17:03:16 +00:00 |
ncpuset.pas
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* generate jump tables into the same section as the code as otherwise we'll get bogus relocations (in case of clang.exe) or a future support for armasm64.exe will reject the relative symbols outright
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2020-04-21 06:06:36 +00:00 |
ra64con.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
ra64dwa.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
ra64nor.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
ra64num.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
ra64rni.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
ra64sri.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
ra64sta.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
ra64std.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
ra64sup.inc
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
racpu.pas
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
racpugas.pas
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+ added b.cc/b.cs support to AArch64 assembler reader (mantis #38485)
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2021-02-24 15:40:22 +00:00 |
rgcpu.pas
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* AArch64: fix spilling integer registers to stack offsets that cannot be
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2021-04-14 20:56:32 +00:00 |
symcpu.pas
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o fixes handling of iso i/o parameters/program parameters:
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2015-05-01 20:58:31 +00:00 |
tripletcpu.pas
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* mark all external assemblers using an LLVM tool using af_llvm
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2020-07-19 14:30:35 +00:00 |