Jonas Maebe b57c95043f + support overriding tdef/tsym methods with target-specific functionality: ... o made all (non-abstract) tdef and tsym constructors virtual o added c*def/c*sym classref types for every (non-abstract) t*def/t*sym class o added cpusym unit for every architecture that derives a tcpu*def/tcpu*sym class from the base classes, and initialises the c*def/c*sym classes with them. This is done so that the llvm target will be able to derive from the tcpu*def/sym classes without umpteen ifdefs, and it also means that the WPO can devirtualise everything because the c* variables are only initialised with one class type o replaced all t*def/t*sym constructor calls with c*def/c*sym constructor calls git-svn-id: trunk@27361 -		2014-03-29 22:31:55 +00:00
..
aasmcpu.pas
aoptcpu.pas	+ SPARC: two more peephole optimizations	2014-02-16 12:29:31 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	* SPARC: r26561 caused a_op_const_reg_reg used for zero-extending 8-bit values to be optimized away. Fixed by replacing it with an explicit instruction.	2014-01-22 21:37:37 +00:00
cpubase.pas	* SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches.	2013-12-27 06:45:49 +00:00
cpuelf.pas
cpugas.pas	Handle asmextraopt in powerpc, mips and sparc assemblers	2014-01-21 00:19:17 +00:00
cpuinfo.pas
cpunode.pas	+ support overriding tdef/tsym methods with target-specific functionality:	2014-03-29 22:31:55 +00:00
cpupara.pas	- i386, x86_64, SPARC: removed paramanager.getintparaloc overrides, it is handled by generic implementation since r24716.	2014-02-24 16:01:14 +00:00
cpupi.pas	* SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code.	2013-12-27 19:53:38 +00:00
cputarg.pas
hlcgcpu.pas
itcpugas.pas
ncpuadd.pas	* completed thlcgobj.location_force_fpureg(), use it everywhere and removed	2014-03-10 09:01:05 +00:00
ncpucall.pas
ncpucnv.pas	* completed thlcgobj.location_force_fpureg(), use it everywhere and removed	2014-03-10 09:01:05 +00:00
ncpuinln.pas	* completed thlcgobj.location_force_fpureg(), use it everywhere and removed	2014-03-10 09:01:05 +00:00
ncpumat.pas	* completed thlcgobj.location_force_fpureg(), use it everywhere and removed	2014-03-10 09:01:05 +00:00
ncpuset.pas	* MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets).	2014-03-10 23:02:05 +00:00
opcode.inc	+ SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently.	2013-12-21 16:27:24 +00:00
racpu.pas
racpugas.pas	* SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches.	2013-12-27 06:45:49 +00:00
rgcpu.pas	+ SPARC: implemented register spill replacement.	2014-01-03 08:14:43 +00:00
rspcon.inc
rspdwrf.inc
rspnor.inc
rspnum.inc
rsprni.inc
rspsri.inc
rspstab.inc
rspstd.inc
rspsup.inc
spreg.dat
strinst.inc	+ SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently.	2013-12-21 16:27:24 +00:00
symcpu.pas	+ support overriding tdef/tsym methods with target-specific functionality:	2014-03-29 22:31:55 +00:00